Patch [0 of 7]: PowerPC: Add -mcpu=future

Patch [0 of 7]: PowerPC: Add -mcpu=future

[Michael Meissner]

This series of patches takes the first 2 patches from the dense math patches to
add the support for -mcpu=future.

If these patches are approved, I will re-base the rest of the dense math
patches off of these patches.

While patch #1 of the series was fairly self contained, in that it added the
basic support for -mcpu=future, I have split that patch into 6 patches.  I have
included the 2nd patch (enable using load vector pair and store vector pair for
memcpy) as patch #7 in this series.

Note, you need patches 1-5 at least to be installed to enable using
-mcpu=future.

Patch #1 adds the -mcpu=future option.  I added a new ISA bit to make things
like target attribute or target pragmas correctly enable or disable
-mcpu=future support.  Because you have to have a switch to create the ISA
bits, I added -mfuture, but I added a warning if the user used this option
directly.

Patch #2 adds support to print out that future is used with -mdebug=reg.

Patch #3 defines _ARCH_PWR_FUTURE if -mcpu=future is used.

Patch #4 passes -mfuture to the assembler if -mcpu=future is used.

Patch #5 turns the tuning for -mcpu=future into -mtune=power10.  It is likely
that we will need to flesh out the future tuning support if/when the future
machine becomes a real PowerPC.

Patch #6 emits the .machine future option to the assembler if -mcpu=future is
used (or target attribute/pragma are used).

Patch #7 enables generating load vector pair or store vector pair instruction
for memcpy and similar functions if -mcpu=future was used.  Late in the power10
development, we decided to not generate load vector pair and store vector pair
instructures due to some interactions that those instructions caused in some
cases.

I have tested these patches on both little endian and big endian systems, and
there were no regressions.  Even though these patches have been posted for 1.5
years now, I assume they have to wait for GCC 15.  But I will immediately want
to back port these to GCC 14.1 after they go into GCC 15.

-- 
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meissner@linux.ibm.com

Patch [1 of 7]: Add initial -mcpu=future support.

[Michael Meissner]

This patch adds the basic support for -mcpu=future, which is a framework to add
support for possible future PowerPCs.  This patch is only sets the future bit
in the ISA options.

Can I check this into GCC 15 when it opens up, and immediately back port it to
GCC 14 after GCC 14.0 is released?

2024-02-14  Michael Meissner  <meissner@linux.ibm.com>

gcc/

	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New option
	bits for -mcpu=future.
	(POWERPC_MASKS): Add -mfuture mask.
	(future cpu): Add -mcpu=future.
	* config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): New processor type.
	* config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Likewise.
	* config/rs6000/rs6000.md (cpu attribute): Likewise.
	* config/rs6000/rs6000.opt (-mfuture): New insert mask for -mcpu=future.
	* doc/invoke.texi (PowerPC options): Add -mcpu=future.
---
 gcc/config/rs6000/rs6000-cpus.def   | 6 ++++++
 gcc/config/rs6000/rs6000-opts.h     | 1 +
 gcc/config/rs6000/rs6000-tables.opt | 3 +++
 gcc/config/rs6000/rs6000.md         | 2 +-
 gcc/config/rs6000/rs6000.opt        | 4 ++++
 gcc/doc/invoke.texi                 | 2 +-
 6 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index d28cc87eb2a..a47075f8249 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -88,6 +88,10 @@
 				 | OPTION_MASK_POWER10			\
 				 | OTHER_POWER10_MASKS)
 
+/* Flags for a potential future processor that may or may not be delivered.  */
+#define ISA_FUTURE_MASKS_SERVER	(ISA_3_1_MASKS_SERVER			\
+				 | OPTION_MASK_FUTURE)
+
 /* Flags that need to be turned off if -mno-power9-vector.  */
 #define OTHER_P9_VECTOR_MASKS	(OPTION_MASK_FLOAT128_HW		\
 				 | OPTION_MASK_P9_MINMAX)
@@ -135,6 +139,7 @@
 				 | OPTION_MASK_LOAD_VECTOR_PAIR		\
 				 | OPTION_MASK_POWER10			\
 				 | OPTION_MASK_P10_FUSION		\
+				 | OPTION_MASK_FUTURE			\
 				 | OPTION_MASK_HTM			\
 				 | OPTION_MASK_ISEL			\
 				 | OPTION_MASK_MFCRF			\
@@ -267,3 +272,4 @@ RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT
 RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64
 	    | ISA_2_7_MASKS_SERVER | OPTION_MASK_HTM)
 RS6000_CPU ("rs64", PROCESSOR_RS64A, OPTION_MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64 | ISA_FUTURE_MASKS_SERVER)
diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index 33fd0efc936..b2ae180c0f0 100644
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -62,6 +62,7 @@ enum processor_type
    PROCESSOR_POWER8,
    PROCESSOR_POWER9,
    PROCESSOR_POWER10,
+   PROCESSOR_FUTURE,
 
    PROCESSOR_RS64A,
    PROCESSOR_MPCCORE,
diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
index 65f46709716..97fa98a2e65 100644
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -197,3 +197,6 @@ Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(55)
 EnumValue
 Enum(rs6000_cpu_opt_value) String(rs64) Value(56)
 
+EnumValue
+Enum(rs6000_cpu_opt_value) String(future) Value(57)
+
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 4acb4031ae0..bd0ecdd9007 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -350,7 +350,7 @@ (define_attr "cpu"
    ppc750,ppc7400,ppc7450,
    ppc403,ppc405,ppc440,ppc476,
    ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,
-   power4,power5,power6,power7,power8,power9,power10,
+   power4,power5,power6,power7,power8,power9,power10,future,
    rs64a,mpccore,cell,ppca2,titan"
   (const (symbol_ref "(enum attr_cpu) rs6000_tune")))
 
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 60b923f5e4b..4ad1d8e302c 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -612,6 +612,10 @@ mrop-protect
 Target Var(rs6000_rop_protect) Init(0)
 Enable instructions that guard against return-oriented programming attacks.
 
+mfuture
+Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>)
+Generate (do not generate) store vector pair instructions.
+
 mprivileged
 Target Var(rs6000_privileged) Init(0)
 Generate code that will run in privileged state.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 71339b8b30f..dcc9f82171c 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -31091,7 +31091,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
 @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
 @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
 @samp{power9}, @samp{power10}, @samp{powerpc}, @samp{powerpc64},
-@samp{powerpc64le}, @samp{rs64}, and @samp{native}.
+@samp{powerpc64le}, @samp{rs64}, @samp{future}, and @samp{native}.
 
 @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
 @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
-- 
2.43.0


-- 
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meissner@linux.ibm.com

Patch [2 of 7]: Add debugging for -mcpu=future

[Michael Meissner]

This patch prints that -mcpu=future was selected if you use the debugging
switch -mdebug=reg.

2024-02-14  Michael Meissner  <meissner@linux.ibm.com>

gcc/

	* config/rs6000/rs6000.cc (rs6000_opt_masks): Add entry to print out
	-mfuture in the isa flags.
---
 gcc/config/rs6000/rs6000.cc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 68a14c6f88a..2064709aa97 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -24505,6 +24505,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128-hardware",	OPTION_MASK_FLOAT128_HW,	false, true  },
   { "fprnd",			OPTION_MASK_FPRND,		false, true  },
   { "power10",			OPTION_MASK_POWER10,		false, true  },
+  { "future",			OPTION_MASK_FUTURE,		false, true  },
   { "hard-dfp",			OPTION_MASK_DFP,		false, true  },
   { "htm",			OPTION_MASK_HTM,		false, true  },
   { "isel",			OPTION_MASK_ISEL,		false, true  },
-- 
2.43.0


-- 
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meissner@linux.ibm.com

Patch [3 of 7]: Define _ARCH_PWR_FUTURE if -mcpu=future.

[Michael Meissner]

This patch defines _ARCH_PWR_FUTURE if -mcpu=future was used.

2024-02-14  Michael Meissner  <meissner@linux.ibm.com>

gcc/

	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
	_ARCH_PWR_FUTURE if -mcpu=future.
---
 gcc/config/rs6000/rs6000-c.cc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index ce0b14a8d37..f2fb5bef678 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -447,6 +447,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
   if ((flags & OPTION_MASK_POWER10) != 0)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
+  if ((flags & OPTION_MASK_FUTURE) != 0)
+    rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR_FUTURE");
   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
     rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
   if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
-- 
2.43.0


-- 
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meissner@linux.ibm.com

Patch [4 of 7]: Pass -mfuture to assembler if -mcpu=future.

[Michael Meissner]

This patch passes -mfuture to the assembler if the user used -mcpu=future.

2024-02-14  Michael Meissner  <meissner@linux.ibm.com>

gcc/

	* config/rs6000/rs6000.h (ASM_CPU_SPEC): If -mcpu=future, pass -mfuture
	to the assembler.
---
 gcc/config/rs6000/rs6000.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 2291fe8d3a3..43209f9a6e7 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -163,6 +163,7 @@
   mcpu=e5500: -me5500; \
   mcpu=e6500: -me6500; \
   mcpu=titan: -mtitan; \
+  mcpu=future: -mfuture; \
   !mcpu*: %{mpower9-vector: -mpower9; \
 	    mpower8-vector|mcrypto|mdirect-move|mhtm: -mpower8; \
 	    mvsx: -mpower7; \
-- 
2.43.0


-- 
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meissner@linux.ibm.com

Patch [5 of 7]: Make -mtune=future be the same as -mtune=power10.

[Michael Meissner]

This patch makes -mcpu=future act like -mcpu=power10 in terms of tuning.  If
future patches changes the tuning, then this patch woucl be changed to use the
new tuning information.  Until there is different tuning, this patch does not
allow the user to explicitly use -mtune=future.

2024-02-14  Michael Meissner  <meissner@linux.ibm.com>

gcc/

	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
	-mtune=future become -mtune=power10.
---
 gcc/config/rs6000/rs6000.cc | 28 ++++++++++++++++++++++++++--
 1 file changed, 26 insertions(+), 2 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 2064709aa97..5e5e677e153 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -3756,16 +3756,40 @@ rs6000_option_override_internal (bool global_init_p)
     rs6000_isa_flags &= ~OPTION_MASK_POWERPC64;
 #endif
 
+  /* At the moment, we don't have explicit -mtune=future support.  If the user
+     explicitly uses -mtune=future, give a warning.  If not, use the power10
+     tuning until future tuning is added.  */
   if (rs6000_tune_index >= 0)
-    tune_index = rs6000_tune_index;
+    {
+      enum processor_type cur_proc
+	= processor_target_table[rs6000_tune_index].processor;
+
+      if (cur_proc == PROCESSOR_FUTURE)
+	{
+	  warning (0, "%qs is not currently supported", "-mtune=future");
+	  rs6000_tune_index = rs6000_cpu_name_lookup ("power10");
+	}
+      tune_index = rs6000_tune_index;
+    }
   else if (cpu_index >= 0)
-    rs6000_tune_index = tune_index = cpu_index;
+    {
+      enum processor_type cur_cpu
+	= processor_target_table[cpu_index].processor;
+
+      rs6000_tune_index = tune_index
+	= (cur_cpu == PROCESSOR_FUTURE
+	   ? rs6000_cpu_name_lookup ("power10")
+	   : cpu_index);
+    }
   else
     {
       size_t i;
       enum processor_type tune_proc
 	= (TARGET_POWERPC64 ? PROCESSOR_DEFAULT64 : PROCESSOR_DEFAULT);
 
+      if (tune_proc == PROCESSOR_FUTURE)
+	tune_proc = PROCESSOR_POWER10;
+
       tune_index = -1;
       for (i = 0; i < ARRAY_SIZE (processor_target_table); i++)
 	if (processor_target_table[i].processor == tune_proc)
-- 
2.43.0


-- 
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meissner@linux.ibm.com

Patch [6 of 7]: Set future machine type in assembler if -mcpu=future

[Michael Meissner]

This patch uses the .machine directive to tell the assembler to use any
possible future instructions.

2024-02-14  Michael Meissner  <meissner@linux.ibm.com>

gcc/

	* config/rs6000/rs6000.cc (rs6000_machine_from_flags): Output .machine
	future if -mcpu=future.
---
 gcc/config/rs6000/rs6000.cc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 5e5e677e153..6bd537836d1 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5968,6 +5968,8 @@ rs6000_machine_from_flags (void)
   /* Disable the flags that should never influence the .machine selection.  */
   flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL);
 
+  if ((flags & (ISA_FUTURE_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
+    return "future";
   if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
     return "power10";
   if ((flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0)
-- 
2.43.0


-- 
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meissner@linux.ibm.com

Patch [7 of 7]: Enable using vector pair load/store for -mcpu=future

[Michael Meissner]

Late in the development of power10, we discovered that there were some issues
in using load vector pair and store vector pair instructions to do memory
copies, so the defaults were modified to not use these instructions.  This
patch re-enables using load and store vector pair instructions.

Previously the -mblock-ops-vector-pair switch was not set in POWERPC_MASKS.
This means the option was not reset if the cpu was changed via target
attributes or targt pragmas.  I added this mask to POWERPC_MASKS since the
option is set via -mcpu=future.

2024-02-14  Michael Meissner  <meissner@linux.ibm.com>

gcc/

	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Turn on
	-mblock-ops-vector-pair for -mcpu=future.
	(POWERPC_MASKS): Add -mblock-ops-vector-pair.
---
 gcc/config/rs6000/rs6000-cpus.def | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index a47075f8249..ed934e0213e 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -90,6 +90,7 @@
 
 /* Flags for a potential future processor that may or may not be delivered.  */
 #define ISA_FUTURE_MASKS_SERVER	(ISA_3_1_MASKS_SERVER			\
+				 | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR	\
 				 | OPTION_MASK_FUTURE)
 
 /* Flags that need to be turned off if -mno-power9-vector.  */
@@ -127,6 +128,7 @@
 
 /* Mask of all options to set the default isa flags based on -mcpu=<xxx>.  */
 #define POWERPC_MASKS		(OPTION_MASK_ALTIVEC			\
+				 | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR	\
 				 | OPTION_MASK_CMPB			\
 				 | OPTION_MASK_CRYPTO			\
 				 | OPTION_MASK_DFP			\
-- 
2.43.0


-- 
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meissner@linux.ibm.com