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Wed, 14 Feb 2024 07:25:52 GMT Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2F32658069; Wed, 14 Feb 2024 07:25:50 +0000 (GMT) Received: from smtpav05.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BA9A458068; Wed, 14 Feb 2024 07:25:49 +0000 (GMT) Received: from cowardly-lion.the-meissners.org (unknown [9.61.179.40]) by smtpav05.dal12v.mail.ibm.com (Postfix) with ESMTPS; Wed, 14 Feb 2024 07:25:49 +0000 (GMT) Date: Wed, 14 Feb 2024 02:25:48 -0500 From: Michael Meissner To: gcc-patches@gcc.gnu.org, Michael Meissner , Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner Subject: Patch [0 of 7]: PowerPC: Add -mcpu=future Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , "Kewen.Lin" , David Edelsohn , Peter Bergner MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-TM-AS-GCONF: 00 X-Proofpoint-GUID: uRoYmj7mN9v7BJImsKiyQ5zic4VQ6_Ln X-Proofpoint-ORIG-GUID: 1f83QNqBEIuFgXSQuJwDCPk_8o0sPNPS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-13_16,2024-02-12_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 malwarescore=0 suspectscore=0 mlxlogscore=463 adultscore=0 mlxscore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2402140057 X-Spam-Status: No, score=-3.7 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This series of patches takes the first 2 patches from the dense math patches to add the support for -mcpu=future. If these patches are approved, I will re-base the rest of the dense math patches off of these patches. While patch #1 of the series was fairly self contained, in that it added the basic support for -mcpu=future, I have split that patch into 6 patches. I have included the 2nd patch (enable using load vector pair and store vector pair for memcpy) as patch #7 in this series. Note, you need patches 1-5 at least to be installed to enable using -mcpu=future. Patch #1 adds the -mcpu=future option. I added a new ISA bit to make things like target attribute or target pragmas correctly enable or disable -mcpu=future support. Because you have to have a switch to create the ISA bits, I added -mfuture, but I added a warning if the user used this option directly. Patch #2 adds support to print out that future is used with -mdebug=reg. Patch #3 defines _ARCH_PWR_FUTURE if -mcpu=future is used. Patch #4 passes -mfuture to the assembler if -mcpu=future is used. Patch #5 turns the tuning for -mcpu=future into -mtune=power10. It is likely that we will need to flesh out the future tuning support if/when the future machine becomes a real PowerPC. Patch #6 emits the .machine future option to the assembler if -mcpu=future is used (or target attribute/pragma are used). Patch #7 enables generating load vector pair or store vector pair instruction for memcpy and similar functions if -mcpu=future was used. Late in the power10 development, we decided to not generate load vector pair and store vector pair instructures due to some interactions that those instructions caused in some cases. I have tested these patches on both little endian and big endian systems, and there were no regressions. Even though these patches have been posted for 1.5 years now, I assume they have to wait for GCC 15. But I will immediately want to back port these to GCC 14.1 after they go into GCC 15. -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meissner@linux.ibm.com