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Tue, 25 Jun 2024 16:04:48 GMT Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 89E9B20043; Tue, 25 Jun 2024 16:04:46 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4A11720040; Tue, 25 Jun 2024 16:04:46 +0000 (GMT) Received: from li-819a89cc-2401-11b2-a85c-cca1ce6aa768.ibm.com (unknown [9.171.36.222]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTPS; Tue, 25 Jun 2024 16:04:46 +0000 (GMT) Date: Tue, 25 Jun 2024 18:04:45 +0200 From: Stefan Schulze Frielinghaus To: Paul Koning Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH] Hard register asm constraint Message-ID: References: <20240524091312.209365-1-stefansf@linux.ibm.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 7k9WuZ3-bq5DmMvpBr9N3iY3Rdgr6bLz X-Proofpoint-ORIG-GUID: WmUJTZC_JoVf7anb7gm737Jiz9jHyknO X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-25_11,2024-06-25_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 mlxscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 adultscore=0 bulkscore=0 clxscore=1015 mlxlogscore=627 malwarescore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2406250118 X-Spam-Status: No, score=-2.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,KAM_SHORT,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On Tue, Jun 25, 2024 at 10:03:34AM -0400, Paul Koning wrote: > > > > On Jun 24, 2024, at 1:50 AM, Stefan Schulze Frielinghaus wrote: > > > > Ping. > > > > On Mon, Jun 10, 2024 at 07:19:19AM +0200, Stefan Schulze Frielinghaus wrote: > >> Ping. > >> > >> On Fri, May 24, 2024 at 11:13:12AM +0200, Stefan Schulze Frielinghaus wrote: > >>> This implements hard register constraints for inline asm. A hard register > >>> constraint is of the form {regname} where regname is any valid register. This > >>> basically renders register asm superfluous. For example, the snippet > >>> > >>> int test (int x, int y) > >>> { > >>> register int r4 asm ("r4") = x; > >>> register int r5 asm ("r5") = y; > >>> unsigned int copy = y; > >>> asm ("foo %0,%1,%2" : "+d" (r4) : "d" (r5), "d" (copy)); > >>> return r4; > >>> } > >>> > >>> could be rewritten into > >>> > >>> int test (int x, int y) > >>> { > >>> asm ("foo %0,%1,%2" : "+{r4}" (x) : "{r5}" (y), "d" (y)); > >>> return x; > >>> } > > I like this idea but I'm wondering: regular constraints specify what sort of value is needed, for example an int vs. a short int vs. a float. The notation you've shown doesn't seem to have that aspect. As Maciej already pointed out the type of the expression should suffice. My assumption was that an asm can deal with a value as is or its promoted value. At least for integer values this should be fine and AFAICS is also the case for simple constraints like "r" which do not define any mode. I've probably overseen something but which constraint differentiates between int vs short? However, you have a good point with this and I should test this more. > The other comment is that I didn't see documentation updates to reflect this new feature. I didn't came up with documentation yet since I was not sure whether such a proposal would be accepted at all, i.e., just wanted to hear whether you see some show stoppers or not. Assuming this goes well I guess it should be documented under simple constraints https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html Thanks, Stefan