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Subject: Re: [PATCH, GCC/ARM, 0/3] Add support for ARMv8-R
To: Christophe Lyon <christophe.lyon@linaro.org>
Cc: Kyrill Tkachov <kyrylo.tkachov@arm.com>, Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>, Richard Earnshaw <richard.earnshaw@arm.com>, "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
References: <9ab04ae2-a65a-11cc-dfaf-1a20a8137e4e@foss.arm.com> <CAKdteObBSU96i9i6mb0ECWGjeTVu4BHYHG4gYzoYbmGAPdzosw@mail.gmail.com> <7bdda77b-8d44-e8cb-78d5-525503e19455@foss.arm.com> <CAKdteObybj16RiScvkZBSoK8Mp+1XZh2E24T_fkyvzo6k7vXPw@mail.gmail.com>
From: Thomas Preudhomme <thomas.preudhomme@foss.arm.com>
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Date: Thu, 29 Jun 2017 16:40:00 -0000
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On 29/06/17 16:12, Christophe Lyon wrote:
> On 29 June 2017 at 16:37, Thomas Preudhomme
>>
>>>
>>> Why do you link armv8-r architecture definition to cortex-r4?
>>
>>
>> I understand, where did I do such a thing?
>>
> 
> In patch #2 you have:
> diff --git a/gcc/config/arm/arm-cpu-data.h b/gcc/config/arm/arm-cpu-data.h
> index d6200f9bdc09a9d0c973853b0152a2800eaf2fe5..48c1d88032c1c5dc7c6cba71511f79fe9f2533ea
> 100644
> --- a/gcc/config/arm/arm-cpu-data.h
> +++ b/gcc/config/arm/arm-cpu-data.h
> @@ -1478,6 +1478,26 @@ static const struct processors all_architectures[] =
>       NULL
>     },
>     {
> +    "armv8-r", TARGET_CPU_cortexr4,
> +    (TF_CO_PROC),
> +    "8R", BASE_ARCH_8R,
> +    {
> +      ISA_ARMv8r,
> +      isa_nobit
> +    },
> +    NULL
> +  },
> +  {
> +    "armv8-r+crc", TARGET_CPU_cortexr4,
> +    (TF_CO_PROC),
> +    "8R", BASE_ARCH_8R,
> +    {
> +      ISA_ARMv8r,isa_bit_crc32,
> +      isa_nobit
> +    },
> +    NULL
> +  },
> +  {
>       "iwmmxt", TARGET_CPU_iwmmxt,
>       (TF_LDSCHED | TF_STRONG | TF_XSCALE),
>       "5TE", BASE_ARCH_5TE,
> 
> Both entries point to TARGET_CPU_cortexr4. I guess that's because r52
> is only defined in patch #3, but then why not update this in patch #3
> are replace r4 with r52?
> 
> Not sure I'm very clear :-)

You are. I must have forgotten about that setting when working on patch #3. I'll 
update this. Thanks for your vigilance :-)

Best regards,

Thomas