From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30653 invoked by alias); 5 Sep 2019 12:53:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 30645 invoked by uid 89); 5 Sep 2019 12:53:25 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-5.8 required=5.0 tests=AWL,BAYES_00 autolearn=ham version=3.3.1 spammy=H*i:sk:a6dd263, help!, H*f:sk:a6dd263 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 05 Sep 2019 12:53:24 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E781828; Thu, 5 Sep 2019 05:53:20 -0700 (PDT) Received: from [10.2.206.47] (e120808-lin.cambridge.arm.com [10.2.206.47]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1974E3F718; Thu, 5 Sep 2019 05:53:19 -0700 (PDT) Subject: Re: [PATCH, AArch64, v3 4/6] aarch64: Add out-of-line functions for LSE atomics To: Richard Henderson , "gcc-patches@gcc.gnu.org" Cc: Ramana Radhakrishnan , "agraf@suse.de" , Marcus Shawcroft , James Greenhalgh References: <20181101214648.29432-1-richard.henderson@linaro.org> <20181101214648.29432-5-richard.henderson@linaro.org> <38e61fc9-6418-1036-058d-2a9d961dac57@foss.arm.com> From: Kyrill Tkachov Message-ID: Date: Thu, 05 Sep 2019 12:53:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-SW-Source: 2019-09/txt/msg00289.txt.bz2 On 9/5/19 1:12 PM, Richard Henderson wrote: > On 9/5/19 3:00 AM, Kyrill Tkachov wrote: >>> +/* Define the symbol gating the LSE implementations.  */ >>> +extern _Bool __aa64_have_atomics >>> +    __attribute__((visibility("hidden"), nocommon)); >>> + >> Bootstrapping this patch series on an Armv8-A system with OOL atomics enabled >> by default gave me link errors >> >> when building libgomp about __aa64_have_atomics being undefined. >> >> I haven't followed the series from the start so maybe I'm missing some things, >> but I don't see where this variable is supposed to "live"? > Removing the extern here is the correct fix. > > Obviously the v3 patch set conversion from C to assembly wasn't properly > tested, or I made some last-minute changes before posting. Time has erased > that memory. > >> Removing the 'extern' from here allows the bootstrap to proceed but it fails at >> a later stage with bizzare errors like: >> >> In file included from build/gencondmd.c:51: >> $SRC/gcc/config/aarch64/constraints.md: In function ‘bool >> satisfies_constraint_S(rtx)’: >> $SRC/gcc/config/aarch64/constraints.md:120:10: error: ‘C’ was not declared in >> this scope; did you mean ‘PC’? >>   120 | (define_constraint "Y" >>       |          ^ >>       |          PC >> >> which looks like a miscompilation of sorts. > I noticed a couple of typos in the assembly that used the wrong register form > (wN vs xN) on the LSE instructions. By chance were you testing on a system > with LSE instructions enabled? No, it was an Armv8.0-A system without LSE. If you need help with testing I'd be happy to help! Kyrill > > > r~