From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 66304 invoked by alias); 24 May 2017 15:17:15 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 65811 invoked by uid 89); 24 May 2017 15:17:14 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 24 May 2017 15:17:13 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A10582B; Wed, 24 May 2017 08:17:14 -0700 (PDT) Received: from e105689-lin.cambridge.arm.com (e105689-lin.cambridge.arm.com [10.2.207.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EE9623F53D; Wed, 24 May 2017 08:17:13 -0700 (PDT) Subject: Re: [PATCH, ARM/AArch64] drop aarch32 support for falkor/qdf24xx To: Jim Wilson References: <6ebb24ef-0912-cf5f-74a4-b4acd372dbf4@arm.com> Cc: "gcc-patches@gcc.gnu.org" From: "Richard Earnshaw (lists)" Message-ID: Date: Wed, 24 May 2017 15:20:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-SW-Source: 2017-05/txt/msg01883.txt.bz2 On 24/05/17 15:18, Jim Wilson wrote: > On Wed, May 24, 2017 at 6:56 AM, Richard Earnshaw (lists) > wrote: >> OK. does this need to go in the gcc-8 changes file? > > Falkor hasn't shipped yet. I'm dropping features that only existed in > preproduction NDA hardware, so there isn't anything end user visible, > and hence I don't think that it needs to be in the release notes. > > Jim > Fair enough, so what about a minimal back-port to GCC-7 that just disables the CPU name for aarch32? R.