From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id A131038582A7 for ; Sun, 10 Jul 2022 02:20:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A131038582A7 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn Received: from [10.20.4.52] (unknown [10.20.4.52]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9Dx_9CIN8pi4CIUAA--.9138S2; Sun, 10 Jul 2022 10:20:56 +0800 (CST) Subject: Re: [PATCH 0/2] loongarch: improve code generation for integer division To: Xi Ruoyao , gcc-patches@gcc.gnu.org Cc: Chenghua Xu , Wang Xuerui References: <535ed6eaa19df38309a773f9bf2542c65f715b6b.camel@xry111.site> From: Lulu Cheng Message-ID: Date: Sun, 10 Jul 2022 10:20:56 +0800 User-Agent: Mozilla/5.0 (X11; Linux mips64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <535ed6eaa19df38309a773f9bf2542c65f715b6b.camel@xry111.site> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-CM-TRANSID: AQAAf9Dx_9CIN8pi4CIUAA--.9138S2 X-Coremail-Antispam: 1UD129KBjvJXoWxJr17tw4rKF1DAF1rXFykGrg_yoW8GF4Dpa y7Cr1rtF48GFZrGrn7Xa45XrsxZrn3GrWa93Wft340kry2vry2qF18KrZ3uFW5Ja4UZryS q3yIkw15W3WjvwUanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUvq14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r1j 6r4UM28EF7xvwVC2z280aVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJV WxJr1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E 2Ix0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJV W8JwACjcxG0xvEwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lc7I2V7IY0VAS07AlzVAY IcxG8wCY02Avz4vE-syl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2 IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v2 6r126r1DMIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2 IY6xkF7I0E14v26r1j6r4UMIIF0xvE42xK8VAvwI8IcIk0rVWrJr0_WFyUJwCI42IY6I8E 87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0x ZFpf9x0JUywZ7UUUUU= X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, KAM_SHORT, NICE_REPLY_A, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 10 Jul 2022 02:21:02 -0000 在 2022/7/7 上午10:23, Xi Ruoyao 写道: > We were generating some unnecessary instructions for integer division. > These two patches improve the code generation to compile > > template T div(T a, T b) { return a / b; } > > into a single division instruction (along with a return instruction of > course) as we expected for T in {int32_t, uint32_t, int64_t}. > > Bootstrapped and regtested on loongarch64-linux-gnu. Ok for trunk? > > Xi Ruoyao (2): > loongarch: add alternatives for idiv insns to improve code generation > loongarch: avoid unnecessary sign-extend after 32-bit division > > gcc/config/loongarch/loongarch-protos.h | 1 + > gcc/config/loongarch/loongarch.cc | 2 +- > gcc/config/loongarch/loongarch.md | 34 ++++++++++++++++------ > gcc/testsuite/gcc.target/loongarch/div-1.c | 9 ++++++ > gcc/testsuite/gcc.target/loongarch/div-2.c | 9 ++++++ > gcc/testsuite/gcc.target/loongarch/div-3.c | 9 ++++++ > gcc/testsuite/gcc.target/loongarch/div-4.c | 9 ++++++ > 7 files changed, 63 insertions(+), 10 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/loongarch/div-1.c > create mode 100644 gcc/testsuite/gcc.target/loongarch/div-2.c > create mode 100644 gcc/testsuite/gcc.target/loongarch/div-3.c > create mode 100644 gcc/testsuite/gcc.target/loongarch/div-4.c > LGTM and spec has been tested. Thanks!