From: "Martin Liška" <mliska@suse.cz>
To: David Malcolm <dmalcolm@redhat.com>, gcc-patches@gcc.gnu.org
Subject: Re: [PATCH 1/2] Port Doxygen support script from Perl to Python; add unittests
Date: Wed, 31 May 2017 12:43:00 -0000 [thread overview]
Message-ID: <a7114ead-941c-cdce-bd32-4929772c298a@suse.cz> (raw)
In-Reply-To: <24d1b317-a1ea-e5a9-beda-de5d75365aec@suse.cz>
[-- Attachment #1: Type: text/plain, Size: 380 bytes --]
On 04/28/2017 02:03 PM, Martin Liška wrote:
> You were not brave enough to port remaining pattern in contrib/filter_knr2ansi.pl,
> right :) ?
Well. It shows the script just screws up many places and I bet we don't have many KNR2 declarations
(if any). I'm attaching diff how it transforms input files. That said, I'm suggesting to eventually
remove usage of the script.
Martin
[-- Attachment #2: knr2ansi.part.patch --]
[-- Type: text/x-patch, Size: 95558 bytes --]
--- /tmp/content 2017-05-31 14:07:13.220516780 +0200
+++ /tmp/content.after 2017-05-31 14:08:51.718531194 +0200
@@ -372,7 +372,7 @@
Returns false if MEM is not suitable for the alias-oracle. */
static bool
-ao_ref_from_mem (ao_ref *ref, const_rtx mem)
+ao_ref_from_mem ()
{
tree expr = MEM_EXPR (mem);
tree base;
@@ -456,7 +456,7 @@
two rtxen may alias, false otherwise. */
static bool
-rtx_refs_may_alias_p (const_rtx x, const_rtx mem, bool tbaa_p)
+rtx_refs_may_alias_p ()
{
ao_ref ref1, ref2;
@@ -474,7 +474,7 @@
such an entry, or NULL otherwise. */
static inline alias_set_entry *
-get_alias_set_entry (alias_set_type alias_set)
+get_alias_set_entry ()
{
return (*alias_sets)[alias_set];
}
@@ -483,7 +483,7 @@
the two MEMs cannot alias each other. */
static inline int
-mems_in_disjoint_alias_sets_p (const_rtx mem1, const_rtx mem2)
+mems_in_disjoint_alias_sets_p ()
{
return (flag_strict_aliasing
&& ! alias_sets_conflict_p (MEM_ALIAS_SET (mem1),
@@ -493,7 +493,7 @@
/* Return true if the first alias set is a subset of the second. */
bool
-alias_set_subset_of (alias_set_type set1, alias_set_type set2)
+alias_set_subset_of ()
{
alias_set_entry *ase2;
@@ -557,7 +557,7 @@
/* Return 1 if the two specified alias sets may conflict. */
int
-alias_sets_conflict_p (alias_set_type set1, alias_set_type set2)
+alias_sets_conflict_p ()
{
alias_set_entry *ase1;
alias_set_entry *ase2;
@@ -631,7 +631,7 @@
/* Return 1 if the two specified alias sets will always conflict. */
int
-alias_sets_must_conflict_p (alias_set_type set1, alias_set_type set2)
+alias_sets_must_conflict_p ()
{
/* Disable TBAA oracle with !flag_strict_aliasing. */
if (!flag_strict_aliasing)
@@ -656,7 +656,7 @@
NULL_TREE, it means we know nothing about the storage. */
int
-objects_must_conflict_p (tree t1, tree t2)
+objects_must_conflict_p ()
{
alias_set_type set1, set2;
@@ -698,7 +698,7 @@
set of this parent is the alias set that must be used for T itself. */
tree
-component_uses_parent_alias_set_from (const_tree t)
+component_uses_parent_alias_set_from ()
{
const_tree found = NULL_TREE;
@@ -761,7 +761,7 @@
alias-set zero. */
static bool
-ref_all_alias_ptr_type_p (const_tree t)
+ref_all_alias_ptr_type_p ()
{
return (TREE_CODE (TREE_TYPE (t)) == VOID_TYPE
|| TYPE_REF_CAN_ALIAS_ALL (t));
@@ -772,7 +772,7 @@
special about dereferencing T. */
static alias_set_type
-get_deref_alias_set_1 (tree t)
+get_deref_alias_set_1 ()
{
/* All we care about is the type. */
if (! TYPE_P (t))
@@ -791,7 +791,7 @@
either a type or an expression. */
alias_set_type
-get_deref_alias_set (tree t)
+get_deref_alias_set ()
{
/* If we're not doing any alias analysis, just assume everything
aliases everything else. */
@@ -817,7 +817,7 @@
can be used for assigning an alias set. */
static tree
-reference_alias_ptr_type_1 (tree *t)
+reference_alias_ptr_type_1 ()
{
tree inner;
@@ -869,7 +869,7 @@
set for T and the replacement. */
tree
-reference_alias_ptr_type (tree t)
+reference_alias_ptr_type ()
{
/* If the frontend assigns this alias-set zero, preserve that. */
if (lang_hooks.get_alias_set (t) == 0)
@@ -894,7 +894,7 @@
from get_deref_alias_set. */
bool
-alias_ptr_types_compatible_p (tree t1, tree t2)
+alias_ptr_types_compatible_p ()
{
if (TYPE_MAIN_VARIANT (t1) == TYPE_MAIN_VARIANT (t2))
return true;
@@ -910,7 +910,7 @@
/* Create emptry alias set entry. */
alias_set_entry *
-init_alias_set_entry (alias_set_type set)
+init_alias_set_entry ()
{
alias_set_entry *ase = ggc_alloc<alias_set_entry> ();
ase->alias_set = set;
@@ -927,7 +927,7 @@
expression. Call language-specific routine for help, if needed. */
alias_set_type
-get_alias_set (tree t)
+get_alias_set ()
{
alias_set_type set;
@@ -1212,7 +1212,7 @@
/* Return a brand-new alias set. */
alias_set_type
-new_alias_set (void)
+new_alias_set ()
{
if (alias_sets == 0)
vec_safe_push (alias_sets, (alias_set_entry *) NULL);
@@ -1234,7 +1234,7 @@
subset of alias set zero. */
void
-record_alias_subset (alias_set_type superset, alias_set_type subset)
+record_alias_subset ()
{
alias_set_entry *superset_entry;
alias_set_entry *subset_entry;
@@ -1291,7 +1291,7 @@
only record the component type if it is not marked non-aliased. */
void
-record_component_aliases (tree type)
+record_component_aliases ()
{
alias_set_type superset = get_alias_set (type);
tree field;
@@ -1365,7 +1365,7 @@
static GTY(()) alias_set_type varargs_set = -1;
alias_set_type
-get_varargs_alias_set (void)
+get_varargs_alias_set ()
{
#if 1
/* We now lower VA_ARG_EXPR, and there's currently no way to attach the
@@ -1387,7 +1387,7 @@
static GTY(()) alias_set_type frame_set = -1;
alias_set_type
-get_frame_alias_set (void)
+get_frame_alias_set ()
{
if (frame_set == -1)
frame_set = new_alias_set ();
@@ -1398,7 +1398,7 @@
/* Create a new, unique base with id ID. */
static rtx
-unique_base_value (HOST_WIDE_INT id)
+unique_base_value ()
{
return gen_rtx_ADDRESS (Pmode, id);
}
@@ -1407,7 +1407,7 @@
those based on X. */
static bool
-unique_base_value_p (rtx x)
+unique_base_value_p ()
{
return GET_CODE (x) == ADDRESS && GET_MODE (x) == Pmode;
}
@@ -1415,7 +1415,7 @@
/* Return true if X is known to be a base value. */
static bool
-known_base_value_p (rtx x)
+known_base_value_p ()
{
switch (GET_CODE (x))
{
@@ -1435,7 +1435,7 @@
/* Inside SRC, the source of a SET, find a base address. */
static rtx
-find_base_value (rtx src)
+find_base_value ()
{
unsigned int regno;
@@ -1609,7 +1609,7 @@
static sbitmap reg_seen;
static void
-record_set (rtx dest, const_rtx set, void *data ATTRIBUTE_UNUSED)
+record_set ()
{
unsigned regno;
rtx src;
@@ -1718,7 +1718,7 @@
/* Return REG_BASE_VALUE for REGNO. Selective scheduler uses this to avoid
using hard registers with non-null REG_BASE_VALUE for renaming. */
rtx
-get_reg_base_value (unsigned int regno)
+get_reg_base_value ()
{
return (*reg_base_value)[regno];
}
@@ -1726,7 +1726,7 @@
/* If a value is known for REGNO, return it. */
rtx
-get_reg_known_value (unsigned int regno)
+get_reg_known_value ()
{
if (regno >= FIRST_PSEUDO_REGISTER)
{
@@ -1740,7 +1740,7 @@
/* Set it. */
static void
-set_reg_known_value (unsigned int regno, rtx val)
+set_reg_known_value ()
{
if (regno >= FIRST_PSEUDO_REGISTER)
{
@@ -1753,7 +1753,7 @@
/* Similarly for reg_known_equiv_p. */
bool
-get_reg_known_equiv_p (unsigned int regno)
+get_reg_known_equiv_p ()
{
if (regno >= FIRST_PSEUDO_REGISTER)
{
@@ -1765,7 +1765,7 @@
}
static void
-set_reg_known_equiv_p (unsigned int regno, bool val)
+set_reg_known_equiv_p ()
{
if (regno >= FIRST_PSEUDO_REGISTER)
{
@@ -1787,7 +1787,7 @@
whose address is the SYMBOL_REF is returned.) */
rtx
-canon_rtx (rtx x)
+canon_rtx ()
{
/* Recursively look for equivalences. */
if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER)
@@ -1825,7 +1825,7 @@
different numbers are, in fact, equivalent. */
static int
-rtx_equal_for_memref_p (const_rtx x, const_rtx y)
+rtx_equal_for_memref_p ()
{
int i;
int j;
@@ -1960,7 +1960,7 @@
}
static rtx
-find_base_term (rtx x)
+find_base_term ()
{
cselib_val *val;
struct elt_loc_list *l, *f;
@@ -2118,7 +2118,7 @@
on the stack pointer. */
bool
-may_be_sp_based_p (rtx x)
+may_be_sp_based_p ()
{
rtx base = find_base_term (x);
return !base || base == static_reg_base_value[STACK_POINTER_REGNUM];
@@ -2128,7 +2128,7 @@
if they refer to different objects and -1 if we can not decide. */
int
-compare_base_decls (tree base1, tree base2)
+compare_base_decls ()
{
int ret;
gcc_checking_assert (DECL_P (base1) && DECL_P (base2));
@@ -2168,7 +2168,7 @@
/* Same as compare_base_decls but for SYMBOL_REF. */
static int
-compare_base_symbol_refs (const_rtx x_base, const_rtx y_base)
+compare_base_symbol_refs ()
{
tree x_decl = SYMBOL_REF_DECL (x_base);
tree y_decl = SYMBOL_REF_DECL (y_base);
@@ -2298,7 +2298,7 @@
(or equal to) that of V. */
static bool
-refs_newer_value_p (const_rtx expr, rtx v)
+refs_newer_value_p ()
{
int minuid = CSELIB_VAL_PTR (v)->uid;
subrtx_iterator::array_type array;
@@ -2313,7 +2313,7 @@
we call cselib to get a more useful rtx. */
rtx
-get_addr (rtx x)
+get_addr ()
{
cselib_val *v;
struct elt_loc_list *l;
@@ -2376,7 +2376,7 @@
is not modified by the memory reference then ADDR is returned. */
static rtx
-addr_side_effect_eval (rtx addr, int size, int n_refs)
+addr_side_effect_eval ()
{
int offset = 0;
@@ -2415,7 +2415,7 @@
absolute value of the sizes as the actual sizes. */
static inline bool
-offset_overlap_p (HOST_WIDE_INT c, int xsize, int ysize)
+offset_overlap_p ()
{
return (xsize == 0 || ysize == 0
|| (c >= 0
@@ -2450,7 +2450,7 @@
If that is fixed the TBAA hack for union type-punning can be removed. */
static int
-memrefs_conflict_p (int xsize, rtx x, int ysize, rtx y, HOST_WIDE_INT c)
+memrefs_conflict_p ()
{
if (GET_CODE (x) == VALUE)
{
@@ -2721,7 +2721,7 @@
an explicit barrier. */
int
-read_dependence (const_rtx mem, const_rtx x)
+read_dependence ()
{
if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
return true;
@@ -2734,7 +2734,7 @@
/* Look at the bottom of the COMPONENT_REF list for a DECL, and return it. */
static tree
-decl_for_component_ref (tree x)
+decl_for_component_ref ()
{
do
{
@@ -2786,7 +2786,7 @@
If LOOP_VARIANT is set, skip offset-based disambiguation */
int
-nonoverlapping_memrefs_p (const_rtx x, const_rtx y, bool loop_invariant)
+nonoverlapping_memrefs_p ()
{
tree exprx = MEM_EXPR (x), expry = MEM_EXPR (y);
rtx rtlx, rtly;
@@ -3049,7 +3049,7 @@
/* True dependence: X is read after store in MEM takes place. */
int
-true_dependence (const_rtx mem, machine_mode mem_mode, const_rtx x)
+true_dependence ()
{
return true_dependence_1 (mem, mem_mode, NULL_RTX,
x, NULL_RTX, /*mem_canonicalized=*/false);
@@ -3158,7 +3158,7 @@
/* Anti dependence: X is written after read in MEM takes place. */
int
-anti_dependence (const_rtx mem, const_rtx x)
+anti_dependence ()
{
return write_dependence_p (mem, x, VOIDmode, NULL_RTX,
/*mem_canonicalized=*/false,
@@ -3182,7 +3182,7 @@
/* Output dependence: X is written after store in MEM takes place. */
int
-output_dependence (const_rtx mem, const_rtx x)
+output_dependence ()
{
return write_dependence_p (mem, x, VOIDmode, NULL_RTX,
/*mem_canonicalized=*/false,
@@ -3208,7 +3208,7 @@
/* Check whether X may be aliased with MEM. Don't do offset-based
memory disambiguation & TBAA. */
int
-may_alias_p (const_rtx mem, const_rtx x)
+may_alias_p ()
{
rtx x_addr, mem_addr;
@@ -3261,7 +3261,7 @@
}
void
-init_alias_target (void)
+init_alias_target ()
{
int i;
@@ -3293,7 +3293,7 @@
to be memory reference. */
static bool memory_modified;
static void
-memory_modified_1 (rtx x, const_rtx pat ATTRIBUTE_UNUSED, void *data)
+memory_modified_1 ()
{
if (MEM_P (x))
{
@@ -3306,7 +3306,7 @@
/* Return true when INSN possibly modify memory contents of MEM
(i.e. address can be modified). */
bool
-memory_modified_in_insn_p (const_rtx mem, const_rtx insn)
+memory_modified_in_insn_p ()
{
if (!INSN_P (insn))
return false;
@@ -3318,7 +3318,7 @@
/* Return TRUE if the destination of a set is rtx identical to
ITEM. */
static inline bool
-set_dest_equal_p (const_rtx set, const_rtx item)
+set_dest_equal_p ()
{
rtx dest = SET_DEST (set);
return rtx_equal_p (dest, item);
@@ -3328,7 +3328,7 @@
array. */
void
-init_alias_analysis (void)
+init_alias_analysis ()
{
unsigned int maxreg = max_reg_num ();
int changed, pass;
@@ -3530,13 +3530,13 @@
Special API for var-tracking pass purposes. */
void
-vt_equate_reg_base_value (const_rtx reg1, const_rtx reg2)
+vt_equate_reg_base_value ()
{
(*reg_base_value)[REGNO (reg1)] = REG_BASE_VALUE (reg2);
}
void
-end_alias_analysis (void)
+end_alias_analysis ()
{
old_reg_base_value = reg_base_value;
vec_free (reg_known_value);
@@ -3544,7 +3544,7 @@
}
void
-dump_alias_stats_in_alias_c (FILE *s)
+dump_alias_stats_in_alias_c ()
{
fprintf (s, " TBAA oracle: %llu disambiguations %llu queries\n"
" %llu are in alias set 0\n"
@@ -4648,7 +4648,7 @@
#define CONST_CAST2(TOTYPE,FROMTYPE,X) ((__extension__(union {FROMTYPE _q; TOTYPE _nq;})(X))._nq)
#elif defined(__GNUC__)
static inline char *
-helper_const_non_const_cast (const char *p)
+helper_const_non_const_cast ()
{
union {
const char *const_c;
@@ -4875,7 +4875,7 @@
/* Return X with all but the lowest bit masked off. */
static inline unsigned HOST_WIDE_INT
-least_bit_hwi (unsigned HOST_WIDE_INT x)
+least_bit_hwi ()
{
return (x & -x);
}
@@ -4883,7 +4883,7 @@
/* True if X is zero or a power of two. */
static inline bool
-pow2_or_zerop (unsigned HOST_WIDE_INT x)
+pow2_or_zerop ()
{
return least_bit_hwi (x) == x;
}
@@ -4891,7 +4891,7 @@
/* True if X is a power of two. */
static inline bool
-pow2p_hwi (unsigned HOST_WIDE_INT x)
+pow2p_hwi ()
{
return x && pow2_or_zerop (x);
}
@@ -4918,7 +4918,7 @@
/* For convenience, define 0 -> word_size. */
static inline int
-clz_hwi (unsigned HOST_WIDE_INT x)
+clz_hwi ()
{
if (x == 0)
return HOST_BITS_PER_WIDE_INT;
@@ -4932,7 +4932,7 @@
}
static inline int
-ctz_hwi (unsigned HOST_WIDE_INT x)
+ctz_hwi ()
{
if (x == 0)
return HOST_BITS_PER_WIDE_INT;
@@ -4946,7 +4946,7 @@
}
static inline int
-ffs_hwi (unsigned HOST_WIDE_INT x)
+ffs_hwi ()
{
# if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
return __builtin_ffsl (x);
@@ -4958,7 +4958,7 @@
}
static inline int
-popcount_hwi (unsigned HOST_WIDE_INT x)
+popcount_hwi ()
{
# if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
return __builtin_popcountl (x);
@@ -4970,19 +4970,19 @@
}
static inline int
-floor_log2 (unsigned HOST_WIDE_INT x)
+floor_log2 ()
{
return HOST_BITS_PER_WIDE_INT - 1 - clz_hwi (x);
}
static inline int
-ceil_log2 (unsigned HOST_WIDE_INT x)
+ceil_log2 ()
{
return floor_log2 (x - 1) + 1;
}
static inline int
-exact_log2 (unsigned HOST_WIDE_INT x)
+exact_log2 ()
{
return pow2p_hwi (x) ? ctz_hwi (x) : -1;
}
@@ -5003,7 +5003,7 @@
/* Like ctz_hwi, except 0 when x == 0. */
static inline int
-ctz_or_zero (unsigned HOST_WIDE_INT x)
+ctz_or_zero ()
{
return ffs_hwi (x) - 1;
}
@@ -5011,7 +5011,7 @@
/* Sign extend SRC starting from PREC. */
static inline HOST_WIDE_INT
-sext_hwi (HOST_WIDE_INT src, unsigned int prec)
+sext_hwi ()
{
if (prec == HOST_BITS_PER_WIDE_INT)
return src;
@@ -5041,7 +5041,7 @@
/* Zero extend SRC starting from PREC. */
static inline unsigned HOST_WIDE_INT
-zext_hwi (unsigned HOST_WIDE_INT src, unsigned int prec)
+zext_hwi ()
{
if (prec == HOST_BITS_PER_WIDE_INT)
return src;
@@ -5055,7 +5055,7 @@
/* Compute the absolute value of X. */
inline HOST_WIDE_INT
-abs_hwi (HOST_WIDE_INT x)
+abs_hwi ()
{
gcc_checking_assert (x != HOST_WIDE_INT_MIN);
return x >= 0 ? x : -x;
@@ -5064,7 +5064,7 @@
/* Compute the absolute value of X as an unsigned type. */
inline unsigned HOST_WIDE_INT
-absu_hwi (HOST_WIDE_INT x)
+absu_hwi ()
{
return x >= 0 ? (unsigned HOST_WIDE_INT)x : -(unsigned HOST_WIDE_INT)x;
}
@@ -6809,7 +6809,7 @@
template <typename storage>
inline unsigned int
wi::int_traits < generic_wide_int <storage> >::
-get_precision (const generic_wide_int <storage> &x)
+get_precision ()
{
return x.get_precision ();
}
@@ -6848,8 +6848,8 @@
/* Create a reference from an existing reference. */
template <bool SE>
inline wide_int_ref_storage <SE>::
-wide_int_ref_storage (const wi::storage_ref &x)
- : storage_ref (x)
+wide_int_ref_storage ( : storage_ref (x)
+)
{}
/* Create a reference to integer X in its natural precision. Note
@@ -7168,7 +7168,7 @@
template <typename T1, typename T2>
inline FIXED_WIDE_INT (N)
wi::int_traits < fixed_wide_int_storage <N> >::
-get_binary_result (const T1 &, const T2 &)
+get_binary_result ()
{
return FIXED_WIDE_INT (N) ();
}
@@ -8913,8 +8913,8 @@
bits and zero-extending the result. Use a full-width rotate if
WIDTH is zero. */
template <typename T1, typename T2>
-WI_UNARY_RESULT (T1)
-wi::lrotate (const T1 &x, const T2 &y, unsigned int width)
+WI_UNARY_RESULT (wi::lrotate (const T1 &x, const T2 &y, unsigned int width)
+)
{
unsigned int precision = get_binary_precision (x, x);
if (width == 0)
@@ -8931,8 +8931,8 @@
bits and zero-extending the result. Use a full-width rotate if
WIDTH is zero. */
template <typename T1, typename T2>
-WI_UNARY_RESULT (T1)
-wi::rrotate (const T1 &x, const T2 &y, unsigned int width)
+WI_UNARY_RESULT (wi::rrotate (const T1 &x, const T2 &y, unsigned int width)
+)
{
unsigned int precision = get_binary_precision (x, x);
if (width == 0)
@@ -8999,8 +8999,7 @@
return wi::F (x, y); \
}
-SIGNED_BINARY_PREDICATE (operator <, lts_p)
-SIGNED_BINARY_PREDICATE (operator <=, les_p)
+SIGNED_BINARY_PREDICATE (SIGNED_BINARY_PREDICATE (operator <=, les_p)
SIGNED_BINARY_PREDICATE (operator >, gts_p)
SIGNED_BINARY_PREDICATE (operator >=, ges_p)
@@ -9009,6 +9008,7 @@
template <typename T1, typename T2>
inline WI_SIGNED_SHIFT_RESULT (T1, T2)
operator << (const T1 &x, const T2 &y)
+)
{
return wi::lshift (x, y);
}
@@ -9022,13 +9022,13 @@
template<typename T>
void
-gt_ggc_mx (generic_wide_int <T> *)
+gt_ggc_mx ()
{
}
template<typename T>
void
-gt_pch_nx (generic_wide_int <T> *)
+gt_pch_nx ()
{
}
@@ -9040,13 +9040,13 @@
template<int N>
void
-gt_ggc_mx (trailing_wide_ints <N> *)
+gt_ggc_mx ()
{
}
template<int N>
void
-gt_pch_nx (trailing_wide_ints <N> *)
+gt_pch_nx ()
{
}
@@ -10579,7 +10579,7 @@
on modern systems running a compiler. */
inline hashval_t
-mul_mod (hashval_t x, hashval_t y, hashval_t inv, int shift)
+mul_mod ()
{
hashval_t t1, t2, t3, t4, q, r;
@@ -10596,7 +10596,7 @@
/* Compute the primary table index for HASH given current prime index. */
inline hashval_t
-hash_table_mod1 (hashval_t hash, unsigned int index)
+hash_table_mod1 ()
{
const struct prime_ent *p = &prime_tab[index];
gcc_checking_assert (sizeof (hashval_t) * CHAR_BIT <= 32);
@@ -10606,7 +10606,7 @@
/* Compute the secondary table index for HASH given current prime index. */
inline hashval_t
-hash_table_mod2 (hashval_t hash, unsigned int index)
+hash_table_mod2 ()
{
const struct prime_ent *p = &prime_tab[index];
gcc_checking_assert (sizeof (hashval_t) * CHAR_BIT <= 32);
@@ -11303,7 +11303,7 @@
template<typename E>
static inline void
-gt_ggc_mx (hash_table<E> *h)
+gt_ggc_mx ()
{
typedef hash_table<E> table;
@@ -11340,7 +11340,7 @@
template<typename D>
static void
-gt_pch_nx (hash_table<D> *h)
+gt_pch_nx ()
{
bool success
= gt_pch_note_object (h->m_entries, h, hashtab_entry_note_pointers<D>);
@@ -11357,14 +11357,14 @@
template<typename D>
static inline void
-gt_pch_nx (hash_table<D> *h, gt_pointer_operator op, void *cookie)
+gt_pch_nx ()
{
op (&h->m_entries, cookie);
}
template<typename H>
inline void
-gt_cleare_cache (hash_table<H> *h)
+gt_cleare_cache ()
{
extern void gt_ggc_mx (typename H::value_type &t);
typedef hash_table<H> table;
@@ -11599,7 +11599,7 @@
static inline
void *
-ggc_internal_cleared_alloc (size_t s CXX_MEM_STAT_INFO)
+ggc_internal_cleared_alloc ()
{
return ggc_internal_cleared_alloc (s, NULL, 0, 1 PASS_MEM_STAT);
}
@@ -11618,7 +11618,7 @@
template<typename T>
void
-finalize (void *p)
+finalize ()
{
static_cast<T *> (p)->~T ();
}
@@ -11636,7 +11636,7 @@
template<typename T>
static inline T *
-ggc_alloc (ALONE_CXX_MEM_STAT_INFO)
+ggc_alloc ()
{
if (need_finalization_p<T> ())
return static_cast<T *> (ggc_internal_alloc (sizeof (T), finalize<T>, 0, 1
@@ -11648,7 +11648,7 @@
template<typename T>
static inline T *
-ggc_cleared_alloc (ALONE_CXX_MEM_STAT_INFO)
+ggc_cleared_alloc ()
{
if (need_finalization_p<T> ())
return static_cast<T *> (ggc_internal_cleared_alloc (sizeof (T),
@@ -11661,7 +11661,7 @@
template<typename T>
static inline T *
-ggc_vec_alloc (size_t c CXX_MEM_STAT_INFO)
+ggc_vec_alloc ()
{
if (need_finalization_p<T> ())
return static_cast<T *> (ggc_internal_alloc (c * sizeof (T), finalize<T>,
@@ -11673,7 +11673,7 @@
template<typename T>
static inline T *
-ggc_cleared_vec_alloc (size_t c CXX_MEM_STAT_INFO)
+ggc_cleared_vec_alloc ()
{
if (need_finalization_p<T> ())
return static_cast<T *> (ggc_internal_cleared_alloc (c * sizeof (T),
@@ -11686,7 +11686,7 @@
}
static inline void *
-ggc_alloc_atomic (size_t s CXX_MEM_STAT_INFO)
+ggc_alloc_atomic ()
{
return ggc_internal_alloc (s PASS_MEM_STAT);
}
@@ -11731,52 +11731,52 @@
/* Memory statistics passing versions of some allocators. Too few of them to
make gengtype produce them, so just define the needed ones here. */
static inline struct rtx_def *
-ggc_alloc_rtx_def_stat (size_t s CXX_MEM_STAT_INFO)
+ggc_alloc_rtx_def_stat ()
{
return (struct rtx_def *) ggc_internal_alloc (s PASS_MEM_STAT);
}
static inline union tree_node *
-ggc_alloc_tree_node_stat (size_t s CXX_MEM_STAT_INFO)
+ggc_alloc_tree_node_stat ()
{
return (union tree_node *) ggc_internal_alloc (s PASS_MEM_STAT);
}
static inline union tree_node *
-ggc_alloc_cleared_tree_node_stat (size_t s CXX_MEM_STAT_INFO)
+ggc_alloc_cleared_tree_node_stat ()
{
return (union tree_node *) ggc_internal_cleared_alloc (s PASS_MEM_STAT);
}
static inline gimple *
-ggc_alloc_cleared_gimple_statement_stat (size_t s CXX_MEM_STAT_INFO)
+ggc_alloc_cleared_gimple_statement_stat ()
{
return (gimple *) ggc_internal_cleared_alloc (s PASS_MEM_STAT);
}
static inline void
-gt_ggc_mx (const char *s)
+gt_ggc_mx ()
{
ggc_test_and_set_mark (const_cast<char *> (s));
}
static inline void
-gt_pch_nx (const char *)
+gt_pch_nx ()
{
}
static inline void
-gt_ggc_mx (int)
+gt_ggc_mx ()
{
}
static inline void
-gt_pch_nx (int)
+gt_pch_nx ()
{
}
static inline void
-gt_pch_nx (unsigned int)
+gt_pch_nx ()
{
}
@@ -12303,7 +12303,7 @@
return true. */
template<typename T, typename A>
inline bool
-vec_safe_space (const vec<T, A, vl_embed> *v, unsigned nelems)
+vec_safe_space ()
{
return v ? v->space (nelems) : nelems == 0;
}
@@ -12312,7 +12312,7 @@
/* If V is NULL, return 0. Otherwise, return V->length(). */
template<typename T, typename A>
inline unsigned
-vec_safe_length (const vec<T, A, vl_embed> *v)
+vec_safe_length ()
{
return v ? v->length () : 0;
}
@@ -12321,7 +12321,7 @@
/* If V is NULL, return NULL. Otherwise, return V->address(). */
template<typename T, typename A>
inline T *
-vec_safe_address (vec<T, A, vl_embed> *v)
+vec_safe_address ()
{
return v ? v->address () : NULL;
}
@@ -12330,7 +12330,7 @@
/* If V is NULL, return true. Otherwise, return V->is_empty(). */
template<typename T, typename A>
inline bool
-vec_safe_is_empty (vec<T, A, vl_embed> *v)
+vec_safe_is_empty ()
{
return v ? v->is_empty () : true;
}
@@ -12362,7 +12362,7 @@
template<typename T, typename A>
inline void
-vec_alloc (vec<T, A, vl_embed> *&v, unsigned nelems CXX_MEM_STAT_INFO)
+vec_alloc ()
{
v = NULL;
vec_safe_reserve (v, nelems, false PASS_MEM_STAT);
@@ -12373,7 +12373,7 @@
template<typename T, typename A>
inline void
-vec_free (vec<T, A, vl_embed> *&v)
+vec_free ()
{
A::release (v);
}
@@ -12382,7 +12382,7 @@
/* Grow V to length LEN. Allocate it, if necessary. */
template<typename T, typename A>
inline void
-vec_safe_grow (vec<T, A, vl_embed> *&v, unsigned len CXX_MEM_STAT_INFO)
+vec_safe_grow ()
{
unsigned oldlen = vec_safe_length (v);
gcc_checking_assert (len >= oldlen);
@@ -12394,7 +12394,7 @@
/* If V is NULL, allocate it. Call V->safe_grow_cleared(LEN). */
template<typename T, typename A>
inline void
-vec_safe_grow_cleared (vec<T, A, vl_embed> *&v, unsigned len CXX_MEM_STAT_INFO)
+vec_safe_grow_cleared ()
{
unsigned oldlen = vec_safe_length (v);
vec_safe_grow (v, len PASS_MEM_STAT);
@@ -12405,7 +12405,7 @@
/* If V is NULL return false, otherwise return V->iterate(IX, PTR). */
template<typename T, typename A>
inline bool
-vec_safe_iterate (const vec<T, A, vl_embed> *v, unsigned ix, T **ptr)
+vec_safe_iterate ()
{
if (v)
return v->iterate (ix, ptr);
@@ -12418,7 +12418,7 @@
template<typename T, typename A>
inline bool
-vec_safe_iterate (const vec<T, A, vl_embed> *v, unsigned ix, T *ptr)
+vec_safe_iterate ()
{
if (v)
return v->iterate (ix, ptr);
@@ -12434,7 +12434,7 @@
V->quick_push(OBJ). */
template<typename T, typename A>
inline T *
-vec_safe_push (vec<T, A, vl_embed> *&v, const T &obj CXX_MEM_STAT_INFO)
+vec_safe_push ()
{
vec_safe_reserve (v, 1, false PASS_MEM_STAT);
return v->quick_push (obj);
@@ -12456,7 +12456,7 @@
/* If V is NULL, do nothing. Otherwise, call V->truncate(SIZE). */
template<typename T, typename A>
inline void
-vec_safe_truncate (vec<T, A, vl_embed> *v, unsigned size)
+vec_safe_truncate ()
{
if (v)
v->truncate (size);
@@ -12466,7 +12466,7 @@
/* If SRC is not NULL, return a pointer to a copy of it. */
template<typename T, typename A>
inline vec<T, A, vl_embed> *
-vec_safe_copy (vec<T, A, vl_embed> *src CXX_MEM_STAT_INFO)
+vec_safe_copy ()
{
return src ? src->copy (ALONE_PASS_MEM_STAT) : NULL;
}
@@ -12492,7 +12492,7 @@
template<typename T, typename A>
inline bool
-vec_safe_contains (vec<T, A, vl_embed> *v, const T &search)
+vec_safe_contains ()
{
return v ? v->contains (search) : false;
}
@@ -12886,7 +12886,7 @@
template<typename T>
void
-gt_ggc_mx (vec<T, va_gc> *v)
+gt_ggc_mx ()
{
extern void gt_ggc_mx (T &);
for (unsigned i = 0; i < v->length (); i++)
@@ -12895,7 +12895,7 @@
template<typename T>
void
-gt_ggc_mx (vec<T, va_gc_atomic, vl_embed> *v ATTRIBUTE_UNUSED)
+gt_ggc_mx ()
{
/* Nothing to do. Vectors of atomic types wrt GC do not need to
be traversed. */
@@ -12906,7 +12906,7 @@
template<typename T, typename A>
void
-gt_pch_nx (vec<T, A, vl_embed> *v)
+gt_pch_nx ()
{
extern void gt_pch_nx (T &);
for (unsigned i = 0; i < v->length (); i++)
@@ -12915,7 +12915,7 @@
template<typename T, typename A>
void
-gt_pch_nx (vec<T *, A, vl_embed> *v, gt_pointer_operator op, void *cookie)
+gt_pch_nx ()
{
for (unsigned i = 0; i < v->length (); i++)
op (&((*v)[i]), cookie);
@@ -12923,7 +12923,7 @@
template<typename T, typename A>
void
-gt_pch_nx (vec<T, A, vl_embed> *v, gt_pointer_operator op, void *cookie)
+gt_pch_nx ()
{
extern void gt_pch_nx (T *, gt_pointer_operator, void *);
for (unsigned i = 0; i < v->length (); i++)
@@ -13083,7 +13083,7 @@
template<typename T>
inline void
-vec_alloc (vec<T> *&v, unsigned nelems CXX_MEM_STAT_INFO)
+vec_alloc ()
{
v = new vec<T>;
v->create (nelems PASS_MEM_STAT);
@@ -13094,7 +13094,7 @@
template<typename T>
inline void
-vec_check_alloc (vec<T, va_heap> *&vec, unsigned nelems CXX_MEM_STAT_INFO)
+vec_check_alloc ()
{
if (!vec)
vec_alloc (vec, nelems PASS_MEM_STAT);
@@ -13105,7 +13105,7 @@
template<typename T>
inline void
-vec_free (vec<T> *&v)
+vec_free ()
{
if (v == NULL)
return;
@@ -13540,7 +13540,7 @@
template<typename T>
inline void
-release_vec_vec (vec<vec<T> > &vec)
+release_vec_vec ()
{
for (unsigned i = 0; i < vec.length (); i++)
vec[i].release ();
@@ -13703,7 +13703,7 @@
/* Produce good hash value combining VAL and VAL2. */
inline
hashval_t
-iterative_hash_hashval_t (hashval_t val, hashval_t val2)
+iterative_hash_hashval_t ()
{
/* the golden ratio; an arbitrary value. */
hashval_t a = 0x9e3779b9;
@@ -13716,7 +13716,7 @@
inline
hashval_t
-iterative_hash_host_wide_int (HOST_WIDE_INT val, hashval_t val2)
+iterative_hash_host_wide_int ()
{
if (sizeof (HOST_WIDE_INT) == sizeof (hashval_t))
return iterative_hash_hashval_t (val, val2);
@@ -15154,21 +15154,21 @@
template<typename K, typename V, typename H>
static inline void
-gt_ggc_mx (hash_map<K, V, H> *h)
+gt_ggc_mx ()
{
gt_ggc_mx (&h->m_table);
}
template<typename K, typename V, typename H>
static inline void
-gt_pch_nx (hash_map<K, V, H> *h)
+gt_pch_nx ()
{
gt_pch_nx (&h->m_table);
}
template<typename K, typename V, typename H>
static inline void
-gt_pch_nx (hash_map<K, V, H> *h, gt_pointer_operator op, void *cookie)
+gt_pch_nx ()
{
op (&h->m_table.m_entries, cookie);
}
@@ -15303,21 +15303,21 @@
template<typename K, typename H>
static inline void
-gt_ggc_mx (hash_set<K, H> *h)
+gt_ggc_mx ()
{
gt_ggc_mx (&h->m_table);
}
template<typename K, typename H>
static inline void
-gt_pch_nx (hash_set<K, H> *h)
+gt_pch_nx ()
{
gt_pch_nx (&h->m_table);
}
template<typename K, typename H>
static inline void
-gt_pch_nx (hash_set<K, H> *h, gt_pointer_operator op, void *cookie)
+gt_pch_nx ()
{
op (&h->m_table.m_entries, cookie);
}
@@ -15411,7 +15411,7 @@
((linemap_location_from_macro_definition_p (line_table, LOC)))
static inline location_t
-get_pure_location (location_t loc)
+get_pure_location ()
{
return get_pure_location (line_table, loc);
}
@@ -15419,7 +15419,7 @@
/* Get the start of any range encoded within location LOC. */
static inline location_t
-get_start (location_t loc)
+get_start ()
{
return get_range_from_loc (line_table, loc).m_start;
}
@@ -15427,7 +15427,7 @@
/* Get the endpoint of any range encoded within location LOC. */
static inline location_t
-get_finish (location_t loc)
+get_finish ()
{
return get_range_from_loc (line_table, loc).m_finish;
}
@@ -15658,7 +15658,7 @@
template <typename T, typename U>
inline bool
-is_a (U *p)
+is_a ()
{
return is_a_helper<T>::test (p);
}
@@ -15668,7 +15668,7 @@
template <typename T, typename U>
inline T
-as_a (U *p)
+as_a ()
{
gcc_checking_assert (is_a <T> (p));
return is_a_helper <T>::cast (p);
@@ -15679,7 +15679,7 @@
template <typename T, typename U>
inline T
-safe_as_a (U *p)
+safe_as_a ()
{
if (p)
{
@@ -15695,7 +15695,7 @@
template <typename T, typename U>
inline T
-dyn_cast (U *p)
+dyn_cast ()
{
if (is_a <T> (p))
return is_a_helper <T>::cast (p);
@@ -16260,7 +16260,7 @@
/* Return the loop tree of FN. */
inline struct loops *
-loops_for_fn (struct function *fn)
+loops_for_fn ()
{
return fn->x_current_loops;
}
@@ -16268,7 +16268,7 @@
/* Set the loop tree of FN to LOOPS. */
inline void
-set_loops_for_fn (struct function *fn, struct loops *loops)
+set_loops_for_fn ()
{
gcc_checking_assert (fn->x_current_loops == NULL || loops == NULL);
fn->x_current_loops = loops;
@@ -16811,7 +16811,7 @@
to allocate from, NULL for GC'd bitmap. */
static inline void
-bitmap_initialize_stat (bitmap head, bitmap_obstack *obstack MEM_STAT_DECL)
+bitmap_initialize_stat ()
{
head->first = head->current = NULL;
head->obstack = obstack;
@@ -17033,7 +17033,7 @@
nonzero bit yet. */
static inline void
-bmp_iter_next (bitmap_iterator *bi, unsigned *bit_no)
+bmp_iter_next ()
{
bi->bits >>= 1;
*bit_no += 1;
@@ -17042,7 +17042,7 @@
/* Advance to first set bit in BI. */
static inline void
-bmp_iter_next_bit (bitmap_iterator * bi, unsigned *bit_no)
+bmp_iter_next_bit ()
{
#if (GCC_VERSION >= 3004)
{
@@ -17065,7 +17065,7 @@
is a bit to iterate. */
static inline bool
-bmp_iter_set (bitmap_iterator *bi, unsigned *bit_no)
+bmp_iter_set ()
{
/* If our current word is nonzero, it contains the bit we want. */
if (bi->bits)
@@ -17111,7 +17111,7 @@
Return true if there is a bit to iterate. */
static inline bool
-bmp_iter_and (bitmap_iterator *bi, unsigned *bit_no)
+bmp_iter_and ()
{
/* If our current word is nonzero, it contains the bit we want. */
if (bi->bits)
@@ -17180,7 +17180,7 @@
iterated bit. */
static inline bool
-bmp_iter_and_compl (bitmap_iterator *bi, unsigned *bit_no)
+bmp_iter_and_compl ()
{
/* If our current word is nonzero, it contains the bit we want. */
if (bi->bits)
@@ -17399,7 +17399,7 @@
/* Test if bit number bitno in the bitmap is set. */
static inline SBITMAP_ELT_TYPE
-bitmap_bit_p (const_sbitmap map, int bitno)
+bitmap_bit_p ()
{
size_t i = bitno / SBITMAP_ELT_BITS;
unsigned int s = bitno % SBITMAP_ELT_BITS;
@@ -17409,7 +17409,7 @@
/* Set bit number BITNO in the sbitmap MAP. */
static inline void
-bitmap_set_bit (sbitmap map, int bitno)
+bitmap_set_bit ()
{
map->elms[bitno / SBITMAP_ELT_BITS]
|= (SBITMAP_ELT_TYPE) 1 << (bitno) % SBITMAP_ELT_BITS;
@@ -17418,7 +17418,7 @@
/* Reset bit number BITNO in the sbitmap MAP. */
static inline void
-bitmap_clear_bit (sbitmap map, int bitno)
+bitmap_clear_bit ()
{
map->elms[bitno / SBITMAP_ELT_BITS]
&= ~((SBITMAP_ELT_TYPE) 1 << (bitno) % SBITMAP_ELT_BITS);
@@ -17466,7 +17466,7 @@
false. */
static inline bool
-bmp_iter_set (sbitmap_iterator *i, unsigned int *n)
+bmp_iter_set ()
{
/* Skip words that are zeros. */
for (; i->word == 0; i->word = i->ptr[i->word_num])
@@ -17492,7 +17492,7 @@
/* Advance to the next bit. */
static inline void
-bmp_iter_next (sbitmap_iterator *i, unsigned *bit_no ATTRIBUTE_UNUSED)
+bmp_iter_next ()
{
i->word >>= 1;
i->bit_num++;
@@ -17918,7 +17918,7 @@
/* Returns true if BB has precisely one successor. */
static inline bool
-single_succ_p (const_basic_block bb)
+single_succ_p ()
{
return EDGE_COUNT (bb->succs) == 1;
}
@@ -17926,7 +17926,7 @@
/* Returns true if BB has precisely one predecessor. */
static inline bool
-single_pred_p (const_basic_block bb)
+single_pred_p ()
{
return EDGE_COUNT (bb->preds) == 1;
}
@@ -17935,7 +17935,7 @@
BB does not have exactly one successor. */
static inline edge
-single_succ_edge (const_basic_block bb)
+single_succ_edge ()
{
gcc_checking_assert (single_succ_p (bb));
return EDGE_SUCC (bb, 0);
@@ -17945,7 +17945,7 @@
if BB does not have exactly one predecessor. */
static inline edge
-single_pred_edge (const_basic_block bb)
+single_pred_edge ()
{
gcc_checking_assert (single_pred_p (bb));
return EDGE_PRED (bb, 0);
@@ -17955,7 +17955,7 @@
if BB does not have exactly one successor. */
static inline basic_block
-single_succ (const_basic_block bb)
+single_succ ()
{
return single_succ_edge (bb)->dest;
}
@@ -17964,7 +17964,7 @@
if BB does not have exactly one predecessor.*/
static inline basic_block
-single_pred (const_basic_block bb)
+single_pred ()
{
return single_pred_edge (bb)->src;
}
@@ -17977,7 +17977,7 @@
};
static inline vec<edge, va_gc> *
-ei_container (edge_iterator i)
+ei_container ()
{
gcc_checking_assert (i.container);
return *i.container;
@@ -17988,7 +17988,7 @@
/* Return an iterator pointing to the start of an edge vector. */
static inline edge_iterator
-ei_start_1 (vec<edge, va_gc> **ev)
+ei_start_1 ()
{
edge_iterator i;
@@ -18001,7 +18001,7 @@
/* Return an iterator pointing to the last element of an edge
vector. */
static inline edge_iterator
-ei_last_1 (vec<edge, va_gc> **ev)
+ei_last_1 ()
{
edge_iterator i;
@@ -18013,7 +18013,7 @@
/* Is the iterator `i' at the end of the sequence? */
static inline bool
-ei_end_p (edge_iterator i)
+ei_end_p ()
{
return (i.index == EDGE_COUNT (ei_container (i)));
}
@@ -18021,14 +18021,14 @@
/* Is the iterator `i' at one position before the end of the
sequence? */
static inline bool
-ei_one_before_end_p (edge_iterator i)
+ei_one_before_end_p ()
{
return (i.index + 1 == EDGE_COUNT (ei_container (i)));
}
/* Advance the iterator to the next element. */
static inline void
-ei_next (edge_iterator *i)
+ei_next ()
{
gcc_checking_assert (i->index < EDGE_COUNT (ei_container (*i)));
i->index++;
@@ -18036,7 +18036,7 @@
/* Move the iterator to the previous element. */
static inline void
-ei_prev (edge_iterator *i)
+ei_prev ()
{
gcc_checking_assert (i->index > 0);
i->index--;
@@ -18044,7 +18044,7 @@
/* Return the edge pointed to by the iterator `i'. */
static inline edge
-ei_edge (edge_iterator i)
+ei_edge ()
{
return EDGE_I (ei_container (i), i.index);
}
@@ -18053,7 +18053,7 @@
NULL is returned when the iterator is pointing at the end of the
sequence. */
static inline edge
-ei_safe_edge (edge_iterator i)
+ei_safe_edge ()
{
return !ei_end_p (i) ? ei_edge (i) : NULL;
}
@@ -18063,7 +18063,7 @@
and NULL otherwise. */
static inline bool
-ei_cond (edge_iterator ei, edge *p)
+ei_cond ()
{
if (!ei_end_p (ei))
{
@@ -18111,14 +18111,14 @@
/* Return true if BB is in a transaction. */
static inline bool
-bb_in_transaction (basic_block bb)
+bb_in_transaction ()
{
return bb->flags & BB_IN_TRANSACTION;
}
/* Return true when one of the predecessor edges of BB is marked with EDGE_EH. */
static inline bool
-bb_has_eh_pred (basic_block bb)
+bb_has_eh_pred ()
{
edge e;
edge_iterator ei;
@@ -18133,7 +18133,7 @@
/* Return true when one of the predecessor edges of BB is marked with EDGE_ABNORMAL. */
static inline bool
-bb_has_abnormal_pred (basic_block bb)
+bb_has_abnormal_pred ()
{
edge e;
edge_iterator ei;
@@ -18148,7 +18148,7 @@
/* Return the fallthru edge in EDGES if it exists, NULL otherwise. */
static inline edge
-find_fallthru_edge (vec<edge, va_gc> *edges)
+find_fallthru_edge ()
{
edge e;
edge_iterator ei;
@@ -18163,7 +18163,7 @@
/* Check tha probability is sane. */
static inline void
-check_probability (int prob)
+check_probability ()
{
gcc_checking_assert (prob >= 0 && prob <= REG_BR_PROB_BASE);
}
@@ -18172,7 +18172,7 @@
Used to combine BB probabilities. */
static inline int
-combine_probabilities (int prob1, int prob2)
+combine_probabilities ()
{
check_probability (prob1);
check_probability (prob2);
@@ -18184,7 +18184,7 @@
constrained to be < REG_BR_PROB_BASE. */
static inline gcov_type
-apply_scale (gcov_type freq, gcov_type scale)
+apply_scale ()
{
return RDIV (freq * scale, REG_BR_PROB_BASE);
}
@@ -18192,7 +18192,7 @@
/* Apply probability PROB on frequency or count FREQ. */
static inline gcov_type
-apply_probability (gcov_type freq, int prob)
+apply_probability ()
{
check_probability (prob);
return apply_scale (freq, prob);
@@ -18201,7 +18201,7 @@
/* Return inverse probability for PROB. */
static inline int
-inverse_probability (int prob1)
+inverse_probability ()
{
check_probability (prob1);
return REG_BR_PROB_BASE - prob1;
@@ -18210,7 +18210,7 @@
/* Return true if BB has at least one abnormal outgoing edge. */
static inline bool
-has_abnormal_or_eh_outgoing_edge_p (basic_block bb)
+has_abnormal_or_eh_outgoing_edge_p ()
{
edge e;
edge_iterator ei;
@@ -18226,7 +18226,7 @@
EDGE_ABNORMAL_CALL or EDGE_EH. */
static inline bool
-has_abnormal_call_or_eh_pred_edge_p (basic_block bb)
+has_abnormal_call_or_eh_pred_edge_p ()
{
edge e;
edge_iterator ei;
@@ -18283,8 +18283,7 @@
a bad idea to rely on any flags being up-to-date. */
/* Only set on blocks that have just been created by create_bb. */
-DEF_BASIC_BLOCK_FLAG(NEW, 0)
-
+DEF_BASIC_BLOCK_FLAG (
/* Set by find_unreachable_blocks. Do not rely on this being set in any
pass. */
DEF_BASIC_BLOCK_FLAG(REACHABLE, 1)
@@ -18435,18 +18434,18 @@
This file is part of GCC.
-GCC is free software; you can redistribute it and/or modify it under
+GCC is free software, you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
+Software Foundation, either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
+WARRANTY, without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
+along with GCC, see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef GCC_CFG_H
@@ -18456,6 +18455,7 @@
/* What sort of profiling information we have. */
enum profile_status_d
+)
{
PROFILE_ABSENT,
PROFILE_GUESSED,
@@ -18623,7 +18623,7 @@
checks are enabled. */
static inline void
-checking_verify_dominators (cdi_direction dir)
+checking_verify_dominators ()
{
if (flag_checking)
verify_dominators (dir);
@@ -18855,7 +18855,7 @@
#endif
static inline CUMULATIVE_ARGS *
-get_cumulative_args (cumulative_args_t arg)
+get_cumulative_args ()
{
#if CHECKING_P
gcc_assert (arg.magic == CUMULATIVE_ARGS_MAGIC);
@@ -18864,7 +18864,7 @@
}
static inline cumulative_args_t
-pack_cumulative_args (CUMULATIVE_ARGS *arg)
+pack_cumulative_args ()
{
cumulative_args_t ret;
@@ -18998,25 +18998,25 @@
#define AND_COMPL_HARD_REG_SET(TO, FROM) ((TO) &= ~ (FROM))
static inline bool
-hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_subset_p ()
{
return (x & ~y) == HARD_CONST (0);
}
static inline bool
-hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_equal_p ()
{
return x == y;
}
static inline bool
-hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_intersect_p ()
{
return (x & y) != HARD_CONST (0);
}
static inline bool
-hard_reg_set_empty_p (const HARD_REG_SET x)
+hard_reg_set_empty_p ()
{
return x == HARD_CONST (0);
}
@@ -19083,25 +19083,25 @@
scan_tp_[1] |= ~ scan_fp_[1]; } while (0)
static inline bool
-hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_subset_p ()
{
return (x[0] & ~y[0]) == 0 && (x[1] & ~y[1]) == 0;
}
static inline bool
-hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_equal_p ()
{
return x[0] == y[0] && x[1] == y[1];
}
static inline bool
-hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_intersect_p ()
{
return (x[0] & y[0]) != 0 || (x[1] & y[1]) != 0;
}
static inline bool
-hard_reg_set_empty_p (const HARD_REG_SET x)
+hard_reg_set_empty_p ()
{
return x[0] == 0 && x[1] == 0;
}
@@ -19163,7 +19163,7 @@
scan_tp_[2] |= ~ scan_fp_[2]; } while (0)
static inline bool
-hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_subset_p ()
{
return ((x[0] & ~y[0]) == 0
&& (x[1] & ~y[1]) == 0
@@ -19171,13 +19171,13 @@
}
static inline bool
-hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_equal_p ()
{
return x[0] == y[0] && x[1] == y[1] && x[2] == y[2];
}
static inline bool
-hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_intersect_p ()
{
return ((x[0] & y[0]) != 0
|| (x[1] & y[1]) != 0
@@ -19185,7 +19185,7 @@
}
static inline bool
-hard_reg_set_empty_p (const HARD_REG_SET x)
+hard_reg_set_empty_p ()
{
return x[0] == 0 && x[1] == 0 && x[2] == 0;
}
@@ -19255,7 +19255,7 @@
scan_tp_[3] |= ~ scan_fp_[3]; } while (0)
static inline bool
-hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_subset_p ()
{
return ((x[0] & ~y[0]) == 0
&& (x[1] & ~y[1]) == 0
@@ -19264,13 +19264,13 @@
}
static inline bool
-hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_equal_p ()
{
return x[0] == y[0] && x[1] == y[1] && x[2] == y[2] && x[3] == y[3];
}
static inline bool
-hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_intersect_p ()
{
return ((x[0] & y[0]) != 0
|| (x[1] & y[1]) != 0
@@ -19279,7 +19279,7 @@
}
static inline bool
-hard_reg_set_empty_p (const HARD_REG_SET x)
+hard_reg_set_empty_p ()
{
return x[0] == 0 && x[1] == 0 && x[2] == 0 && x[3] == 0;
}
@@ -19341,7 +19341,7 @@
*scan_tp_++ |= ~ *scan_fp_++; } while (0)
static inline bool
-hard_reg_set_subset_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_subset_p ()
{
int i;
@@ -19352,7 +19352,7 @@
}
static inline bool
-hard_reg_set_equal_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_equal_p ()
{
int i;
@@ -19363,7 +19363,7 @@
}
static inline bool
-hard_reg_set_intersect_p (const HARD_REG_SET x, const HARD_REG_SET y)
+hard_reg_set_intersect_p ()
{
int i;
@@ -19374,7 +19374,7 @@
}
static inline bool
-hard_reg_set_empty_p (const HARD_REG_SET x)
+hard_reg_set_empty_p ()
{
int i;
@@ -19436,7 +19436,7 @@
}
static inline bool
-hard_reg_set_iter_set (hard_reg_set_iterator *iter, unsigned *regno)
+hard_reg_set_iter_set ()
{
while (1)
{
@@ -19471,7 +19471,7 @@
}
static inline void
-hard_reg_set_iter_next (hard_reg_set_iterator *iter, unsigned *regno)
+hard_reg_set_iter_next ()
{
iter->bits >>= 1;
*regno += 1;
@@ -19678,8 +19678,7 @@
#undef HOOK_TYPE
#define HOOK_TYPE "Target Hook"
-HOOK_VECTOR (TARGET_INITIALIZER, gcc_target)
-
+HOOK_VECTOR (
/* Functions that output assembler for the target. */
#define HOOK_PREFIX "TARGET_ASM_"
HOOK_VECTOR (TARGET_ASM_OUT, asm_out)
@@ -19792,7 +19791,7 @@
DEFHOOK
(globalize_label,
"This target hook is a function to output to the stdio stream\n\
-@var{stream} some commands that will make the label @var{name} global;\n\
+@var{stream} some commands that will make the label @var{name} global,\n\
that is, available for reference from other files.\n\
\n\
The default implementation relies on a proper definition of\n\
@@ -19805,7 +19804,7 @@
(globalize_decl_name,
"This target hook is a function to output to the stdio stream\n\
@var{stream} some commands that will make the name associated with @var{decl}\n\
-global; that is, available for reference from other files.\n\
+global, that is, available for reference from other files.\n\
\n\
The default implementation uses the TARGET_ASM_GLOBALIZE_LABEL target hook.",
void, (FILE *stream, tree decl), default_globalize_decl_name)
@@ -19895,7 +19894,7 @@
\n\
It is desirable to exclude internal labels from the symbol table of the\n\
object file. Most assemblers have a naming convention for labels that\n\
-should be excluded; on many systems, the letter @samp{L} at the\n\
+should be excluded, on many systems, the letter @samp{L} at the\n\
beginning of a label has this effect. You should find out what\n\
convention your system uses, and follow it.\n\
\n\
@@ -19963,13 +19962,13 @@
\n\
On machines that have ``register windows'', the function entry code does\n\
not save on the stack the registers that are in the windows, even if\n\
-they are supposed to be preserved by function calls; instead it takes\n\
+they are supposed to be preserved by function calls, instead it takes\n\
appropriate steps to ``push'' the register stack, if any non-call-used\n\
registers are used in the function.\n\
\n\
@findex frame_pointer_needed\n\
On machines where functions may or may not have frame-pointers, the\n\
-function entry code must vary accordingly; it must set up the frame\n\
+function entry code must vary accordingly, it must set up the frame\n\
pointer if one is wanted, and not otherwise. To determine whether a\n\
frame pointer is in wanted, the macro can refer to the variable\n\
@code{frame_pointer_needed}. The variable's value will be 1 at run\n\
@@ -20093,7 +20092,7 @@
@code{default_asm_named_section} whenever the section flags need to be\n\
emitted in the assembler output. If the hook returns true, then the\n\
numerical value for ELF section flags should be calculated from\n\
-@var{flags} and saved in @var{*num}; the value is printed out instead of the\n\
+@var{flags} and saved in @var{*num}, the value is printed out instead of the\n\
normal sequence of letter codes. If the hook is not defined, or if it\n\
returns false, then @var{num} is ignored and the traditional letter sequence\n\
is emitted.",
@@ -20132,13 +20131,13 @@
/* Return a mask describing how relocations should be treated when
selecting sections. Bit 1 should be set if global relocations
- should be placed in a read-write section; bit 0 should be set if
+ should be placed in a read-write section, bit 0 should be set if
local relocations should be placed in a read-write section. */
DEFHOOK
(reloc_rw_mask,
"Return a mask describing how relocations should be treated when\n\
selecting sections. Bit 1 should be set if global relocations\n\
-should be placed in a read-write section; bit 0 should be set if\n\
+should be placed in a read-write section, bit 0 should be set if\n\
local relocations should be placed in a read-write section.\n\
\n\
The default version of this function returns 3 when @option{-fpic}\n\
@@ -20149,7 +20148,7 @@
default_reloc_rw_mask)
/* Return a section for EXP. It may be a DECL or a constant. RELOC
- is nonzero if runtime relocations must be applied; bit 1 will be
+ is nonzero if runtime relocations must be applied, bit 1 will be
set if the runtime relocations require non-local name resolution.
ALIGN is the required alignment of the data. */
DEFHOOK
@@ -20236,7 +20235,7 @@
\n\
Assume that @var{symbol} is a @code{SYMBOL_REF} for a function taking\n\
no arguments and with no return value. If the target supports initialization\n\
-priorities, @var{priority} is a value between 0 and @code{MAX_INIT_PRIORITY};\n\
+priorities, @var{priority} is a value between 0 and @code{MAX_INIT_PRIORITY},\n\
otherwise it must be @code{DEFAULT_INIT_PRIORITY}.\n\
\n\
If this macro is not defined by the target, a suitable default will\n\
@@ -20287,7 +20286,7 @@
\n\
The effect must be as if @var{function} had been called directly with\n\
the adjusted first argument. This macro is responsible for emitting all\n\
-of the code for a thunk function; @code{TARGET_ASM_FUNCTION_PROLOGUE}\n\
+of the code for a thunk function, @code{TARGET_ASM_FUNCTION_PROLOGUE}\n\
and @code{TARGET_ASM_FUNCTION_EPILOGUE} are not invoked.\n\
\n\
The @var{thunk_fndecl} is redundant. (@var{delta} and @var{function}\n\
@@ -20714,7 +20713,7 @@
@var{ready}[@var{*n_readyp} @minus{} 1] and going to @var{ready}[0]. @var{clock}\n\
is the timer tick of the scheduler. You may modify the ready list and\n\
the number of ready insns. The return value is the number of insns that\n\
-can issue this cycle; normally this is just @code{issue_rate}. See also\n\
+can issue this cycle, normally this is just @code{issue_rate}. See also\n\
@samp{TARGET_SCHED_REORDER2}.",
int, (FILE *file, int verbose, rtx_insn **ready, int *n_readyp, int clock), NULL)
@@ -20723,7 +20722,7 @@
"Like @samp{TARGET_SCHED_REORDER}, but called at a different time. That\n\
function is called whenever the scheduler starts a new cycle. This one\n\
is called once per iteration over a cycle, immediately after\n\
-@samp{TARGET_SCHED_VARIABLE_ISSUE}; it can reorder the ready list and\n\
+@samp{TARGET_SCHED_VARIABLE_ISSUE}, it can reorder the ready list and\n\
return the number of insns to be scheduled in the same cycle. Defining\n\
this hook can be useful if there are frequent situations where\n\
scheduling one insn causes other insns to become ready in the same\n\
@@ -21012,7 +21011,7 @@
delays, however: (b) there's a better chance to predict the actual grouping\n\
that will be formed, and (c) correctly emulating the grouping can be very\n\
important. In such targets one may want to allow issuing dependent insns\n\
-closer to one another---i.e., closer than the dependence distance; however,\n\
+closer to one another---i.e., closer than the dependence distance, however,\n\
not in cases of ``costly dependences'', which this hooks allows to define.",
bool, (struct _dep *_dep, int cost, int distance), NULL)
@@ -21243,14 +21242,14 @@
instruction based on its fustion type, like:\n\
\n\
@smallexample\n\
- ldr r10, [r1, 4] ; fusion_pri=99, pri=96\n\
- add r4, r4, r10 ; fusion_pri=100, pri=100\n\
- ldr r15, [r2, 8] ; fusion_pri=98, pri=92\n\
- sub r5, r5, r15 ; fusion_pri=100, pri=100\n\
- ldr r11, [r1, 0] ; fusion_pri=99, pri=100\n\
- add r4, r4, r11 ; fusion_pri=100, pri=100\n\
- ldr r16, [r2, 12] ; fusion_pri=98, pri=88\n\
- sub r5, r5, r16 ; fusion_pri=100, pri=100\n\
+ ldr r10, [r1, 4] , fusion_pri=99, pri=96\n\
+ add r4, r4, r10 , fusion_pri=100, pri=100\n\
+ ldr r15, [r2, 8] , fusion_pri=98, pri=92\n\
+ sub r5, r5, r15 , fusion_pri=100, pri=100\n\
+ ldr r11, [r1, 0] , fusion_pri=99, pri=100\n\
+ add r4, r4, r11 , fusion_pri=100, pri=100\n\
+ ldr r16, [r2, 12] , fusion_pri=98, pri=88\n\
+ sub r5, r5, r16 , fusion_pri=100, pri=100\n\
@end smallexample\n\
\n\
Scheduling fusion pass then sorts all ready to issue instructions according\n\
@@ -21396,7 +21395,7 @@
@var{v1} and @var{v2}, are the two vectors, each of size @var{VS}, and\n\
the third argument, @var{OFF}, defines how the data will be extracted\n\
from these two vectors: if @var{OFF} is 0, then the returned vector is\n\
-@var{v2}; otherwise, the returned vector is composed from the last\n\
+@var{v2}, otherwise, the returned vector is composed from the last\n\
@var{VS}-@var{OFF} elements of @var{v1} concatenated to the first\n\
@var{OFF} elements of @var{v2}.\n\
\n\
@@ -21556,7 +21555,7 @@
"for modeling the costs of vectorizing a loop or basic block. The default "
"allocates three unsigned integers for accumulating costs for the prologue, "
"body, and epilogue of the loop or basic block. If @var{loop_info} is "
- "non-NULL, it identifies the loop being vectorized; otherwise a single block "
+ "non-NULL, it identifies the loop being vectorized, otherwise a single block "
"is being vectorized.",
void *,
(struct loop *loop_info),
@@ -21800,8 +21799,8 @@
unit with the previous bit-field if their underlying types have\n\
different sizes, and the bit-field will be aligned to the highest\n\
alignment of the underlying types of itself and of the previous\n\
-bit-field; (ii) a zero-sized bit-field will affect the alignment of\n\
-the whole enclosing structure, even if it is unnamed; except that\n\
+bit-field, (ii) a zero-sized bit-field will affect the alignment of\n\
+the whole enclosing structure, even if it is unnamed, except that\n\
(iii) a zero-sized bit-field will be disregarded unless it follows\n\
another bit-field of nonzero size. If this hook returns @code{true},\n\
other macros that control bit-field layout are ignored.\n\
@@ -21901,7 +21900,7 @@
To create a built-in function, call the function\n\
@code{lang_hooks.builtin_function}\n\
which is defined by the language front end. You can use any type nodes set\n\
-up by @code{build_common_tree_nodes};\n\
+up by @code{build_common_tree_nodes},\n\
only language front ends that use those two functions will call\n\
@samp{TARGET_INIT_BUILTINS}.",
void, (void),
@@ -21928,7 +21927,7 @@
"\n\
Expand a call to a machine specific built-in function that was set up by\n\
@samp{TARGET_INIT_BUILTINS}. @var{exp} is the expression for the\n\
-function call; the result should go to @var{target} if that is\n\
+function call, the result should go to @var{target} if that is\n\
convenient, and have mode @var{mode} if that is convenient.\n\
@var{subtarget} may be used as the target for computing one of\n\
@var{exp}'s operands. @var{ignore} is nonzero if the value is to be\n\
@@ -22064,7 +22063,7 @@
"Fold a call to a machine specific built-in function that was set up by\n\
@samp{TARGET_INIT_BUILTINS}. @var{fndecl} is the declaration of the\n\
built-in function. @var{n_args} is the number of arguments passed to\n\
-the function; the arguments themselves are pointed to by @var{argp}.\n\
+the function, the arguments themselves are pointed to by @var{argp}.\n\
The result is another tree, valid for both GIMPLE and GENERIC,\n\
containing a simplified expression for the call's result. If\n\
@var{ignore} is true the value will be ignored.",
@@ -22143,7 +22142,7 @@
to return the appropriate encoding for these types as part of a C++\n\
mangled name. The @var{type} argument is the tree structure representing\n\
the type to be mangled. The hook may be applied to trees which are\n\
-not target-specific fundamental types; it should return @code{NULL}\n\
+not target-specific fundamental types, it should return @code{NULL}\n\
for all such types, as well as arguments it does not recognize. If the\n\
return value is not @code{NULL}, it must point to a statically-allocated\n\
string constant.\n\
@@ -22158,7 +22157,7 @@
@var{n} is the length of @var{name} as above, and @var{code} is the\n\
code used to represent the unqualified version of this type. (See\n\
@code{write_builtin_type} in @file{cp/mangle.c} for the list of\n\
-codes.) In both cases the spaces are for clarity; do not include any\n\
+codes.) In both cases the spaces are for clarity, do not include any\n\
spaces in your string.\n\
\n\
This hook is applied to types prior to typedef resolution. If the mangled\n\
@@ -22233,7 +22232,7 @@
static bool\n\
cannot_modify_jumps_past_reload_p ()\n\
@{\n\
- return (reload_completed || reload_in_progress);\n\
+ return (reload_completed || reload_in_progress),\n\
@}\n\
@end smallexample",
bool, (void),
@@ -22242,8 +22241,8 @@
/* True if FOLLOWER may be modified to follow FOLLOWEE. */
DEFHOOK
(can_follow_jump,
- "FOLLOWER and FOLLOWEE are JUMP_INSN instructions;\
- return true if FOLLOWER may be modified to follow FOLLOWEE;\
+ "FOLLOWER and FOLLOWEE are JUMP_INSN instructions,\
+ return true if FOLLOWER may be modified to follow FOLLOWEE,\
false, if it can't.\
For example, on some targets, certain kinds of branches can't be made to\
follow through a hot/cold partitioning.",
@@ -22270,7 +22269,7 @@
(branch_target_register_callee_saved,
"Branch target register optimization will by default exclude callee-saved\n\
registers\n\
-that are not already live during the current function; if this target hook\n\
+that are not already live during the current function, if this target hook\n\
returns true, they will be included. The target code must than make sure\n\
that all target registers in the class returned by\n\
@samp{TARGET_BRANCH_TARGET_REGISTER_CLASS} that might need saving are\n\
@@ -22460,7 +22459,7 @@
considered a memory reference. This is because in contexts where some\n\
kind of register is required, a pseudo-register with no hard register\n\
must be rejected. For non-hard registers, the strict variant should look\n\
-up the @code{reg_renumber} array; it should then proceed using the hard\n\
+up the @code{reg_renumber} array, it should then proceed using the hard\n\
register number in the array, or treat the pseudo as a memory reference\n\
if the array holds @code{-1}.\n\
\n\
@@ -22607,7 +22606,7 @@
\n\
GCC sets @code{cfun} to a dummy function context during initialization of\n\
some parts of the back end. The hook function is not invoked in this\n\
-situation; you need not worry about the hook being invoked recursively,\n\
+situation, you need not worry about the hook being invoked recursively,\n\
or when the back end is in a partially-initialized state.\n\
@code{cfun} might be @code{NULL} to indicate processing at top level,\n\
outside of any function scope.",
@@ -22684,7 +22683,7 @@
@var{decl}, which may be a variable or function declaration or\n\
an entry in the constant pool. In either case, @var{rtl} is the\n\
rtl in question. Do @emph{not} use @code{DECL_RTL (@var{decl})}\n\
-in this hook; that field may not have been initialized yet.\n\
+in this hook, that field may not have been initialized yet.\n\
\n\
In the case of a constant, it is safe to assume that the rtl is\n\
a @code{mem} whose address is a @code{symbol_ref}. Most decls\n\
@@ -22705,7 +22704,7 @@
@code{symbol_ref}, using @code{SYMBOL_REF_FLAG} or @code{SYMBOL_REF_FLAGS}.\n\
Historically, the name string was modified if it was necessary to\n\
encode more than one bit of information, but this practice is now\n\
-discouraged; use @code{SYMBOL_REF_FLAGS}.\n\
+discouraged, use @code{SYMBOL_REF_FLAGS}.\n\
\n\
The default definition of this hook, @code{default_encode_section_info}\n\
in @file{varasm.c}, sets a number of commonly-useful bits in\n\
@@ -22739,7 +22738,7 @@
particular behavior is guaranteed.\n\
\n\
Note that, unlike @code{SHIFT_COUNT_TRUNCATED}, this function does\n\
-@emph{not} apply to general shift rtxes; it applies only to instructions\n\
+@emph{not} apply to general shift rtxes, it applies only to instructions\n\
that are generated by the named shift patterns.\n\
\n\
The default implementation of this function returns\n\
@@ -22960,7 +22959,7 @@
default_scalar_mode_supported_p)
/* Similarly for vector modes. "Supported" here is less strict. At
- least some operations are supported; need to check optabs or builtins
+ least some operations are supported, need to check optabs or builtins
for further details. */
DEFHOOK
(vector_mode_supported_p,
@@ -23002,8 +23001,8 @@
@smallexample\n\
typedef struct int8x8x3_t\n\
@{\n\
- int8x8_t val[3];\n\
-@} int8x8x3_t;\n\
+ int8x8_t val[3],\n\
+@} int8x8x3_t,\n\
@end smallexample\n\
\n\
If this hook allows @code{val} to have a scalar mode, then\n\
@@ -23032,11 +23031,11 @@
@code{_Float64} and @code{_Float32x} and @code{TFmode} for \n\
@code{_Float128}, if those modes exist and satisfy the requirements for \n\
those types and pass @code{TARGET_SCALAR_MODE_SUPPORTED_P} and \n\
-@code{TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P}; for @code{_Float64x}, it \n\
+@code{TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P}, for @code{_Float64x}, it \n\
returns the first of @code{XFmode} and @code{TFmode} that exists and \n\
-satisfies the same requirements; for other types, it returns \n\
+satisfies the same requirements, for other types, it returns \n\
@code{VOIDmode}. The hook is only called for values of @var{n} and \n\
-@var{extended} that are valid according to ISO/IEC TS 18661-3:2015; that \n\
+@var{extended} that are valid according to ISO/IEC TS 18661-3:2015, that \n\
is, @var{n} is one of 32, 64, 128, or, if @var{extended} is false, 16 or \n\
greater than 128 and a multiple of 32.",
machine_mode, (int n, bool extended),
@@ -23049,11 +23048,11 @@
"This target hook should return the cost of moving data of mode @var{mode}\n\
from a register in class @var{from} to one in class @var{to}. The classes\n\
are expressed using the enumeration values such as @code{GENERAL_REGS}.\n\
-A value of 2 is the default; other values are interpreted relative to\n\
+A value of 2 is the default, other values are interpreted relative to\n\
that.\n\
\n\
It is not required that the cost always equal 2 when @var{from} is the\n\
-same as @var{to}; on some machines it is expensive to move between\n\
+same as @var{to}, on some machines it is expensive to move between\n\
registers if they are not general registers.\n\
\n\
If reload sees an insn consisting of a single @code{set} between two\n\
@@ -23073,7 +23072,7 @@
DEFHOOK
(memory_move_cost,
"This target hook should return the cost of moving data of mode @var{mode}\n\
-between a register of class @var{rclass} and memory; @var{in} is @code{false}\n\
+between a register of class @var{rclass} and memory, @var{in} is @code{false}\n\
if the value is to be written to memory, @code{true} if it is to be read in.\n\
This cost is relative to those in @code{TARGET_REGISTER_MOVE_COST}.\n\
If moving between registers and memory is more expensive than between two\n\
@@ -23152,7 +23151,7 @@
modes @var{mode1} and @var{mode2} for optimization type @var{opt_type}.\n\
The optab is known to have an associated @file{.md} instruction\n\
whose C condition is true. @var{mode2} is only meaningful for conversion\n\
-optabs; for direct optabs it is a copy of @var{mode1}.\n\
+optabs, for direct optabs it is a copy of @var{mode1}.\n\
\n\
For example, when called with @var{op} equal to @code{rint_optab} and\n\
@var{mode1} equal to @code{DFmode}, the hook should say whether the\n\
@@ -23350,7 +23349,7 @@
to do any special allocation, a @code{REG} rtx---that would typically be\n\
the hard register itself, if it is known not to be clobbered---or a\n\
@code{MEM}.\n\
-If you are returning a @code{MEM}, this is only a hint for the allocator;\n\
+If you are returning a @code{MEM}, this is only a hint for the allocator,\n\
it might decide to use another register anyways.\n\
You may use @code{current_function_is_leaf} or \n\
@code{REG_N_SETS} in the hook to determine if the hard\n\
@@ -23410,7 +23409,7 @@
multiple pieces, define this hook to fill in information about the\n\
sizes of those pieces in the table used by the unwinder at runtime.\n\
It will be called by @code{expand_builtin_init_dwarf_reg_sizes} after\n\
-filling in a single size corresponding to each hard register;\n\
+filling in a single size corresponding to each hard register,\n\
@var{address} is the address of the table.",
void, (tree address),
hook_void_tree)
@@ -23530,7 +23529,7 @@
(gimplify_va_arg_expr,
"This hook performs target-specific gimplification of\n\
@code{VA_ARG_EXPR}. The first two parameters correspond to the\n\
-arguments to @code{va_arg}; the latter two are as in\n\
+arguments to @code{va_arg}, the latter two are as in\n\
@code{gimplify.c:gimplify_expr}.",
tree, (tree valist, tree type, gimple_seq *pre_p, gimple_seq *post_p),
std_gimplify_va_arg_expr)
@@ -23819,7 +23818,7 @@
return values. If it is @code{1}, a return value is being promoted and\n\
@code{TARGET_FUNCTION_VALUE} must perform the same promotions done here.\n\
If it is @code{2}, the returned mode should be that of the register in\n\
-which an incoming parameter is copied, or the outgoing result is computed;\n\
+which an incoming parameter is copied, or the outgoing result is computed,\n\
then the hook should return the same mode as @code{promote_mode}, though\n\
the signedness may be different.\n\
\n\
@@ -23887,7 +23886,7 @@
Note that values of mode @code{BLKmode} must be explicitly handled\n\
by this function. Also, the option @option{-fpcc-struct-return}\n\
takes effect regardless of this macro. On most systems, it is\n\
-possible to leave the hook undefined; this causes a default\n\
+possible to leave the hook undefined, this causes a default\n\
definition to be used, whose value is the constant 1 for @code{BLKmode}\n\
values, and 0 otherwise.\n\
\n\
@@ -23902,7 +23901,7 @@
"This hook should return true if values of type @var{type} are returned\n\
at the most significant end of a register (in other words, if they are\n\
padded at the least significant end). You can assume that @var{type}\n\
-is returned in a register; the caller is required to check this.\n\
+is returned in a register, the caller is required to check this.\n\
\n\
Note that the register provided by @code{TARGET_FUNCTION_VALUE} must\n\
be able to hold the complete return value. For example, if a 1-, 2-\n\
@@ -24032,7 +24031,7 @@
for each argument passed to the function, either a register returned by\n\
@code{TARGET_FUNCTION_ARG} or a memory location. It is called just\n\
before the point where argument registers are stored. The type of the\n\
-function to be called is also passed as the second argument; it is\n\
+function to be called is also passed as the second argument, it is\n\
@code{NULL_TREE} for libcalls. The @code{TARGET_END_CALL_ARGS} hook is\n\
invoked just after the code to copy the return reg has been emitted.\n\
This functionality can be used to perform special setup of call argument\n\
@@ -24134,7 +24133,7 @@
/* Return zero for arguments passed entirely on the stack or entirely
in registers. If passed in both, return the number of bytes passed
- in registers; the balance is therefore passed on the stack. */
+ in registers, the balance is therefore passed on the stack. */
DEFHOOK
(arg_partial_bytes,
"This target hook returns the number of bytes at the beginning of an\n\
@@ -24151,7 +24150,7 @@
compiler when this occurs, and how many bytes should go in registers.\n\
\n\
@code{TARGET_FUNCTION_ARG} for these arguments should return the first\n\
-register to be used by the caller for this argument; likewise\n\
+register to be used by the caller for this argument, likewise\n\
@code{TARGET_FUNCTION_INCOMING_ARG}, for the called function.",
int, (cumulative_args_t cum, machine_mode mode, tree type, bool named),
hook_int_CUMULATIVE_ARGS_mode_tree_bool_0)
@@ -24184,9 +24183,9 @@
register and if so, which register.\n\
\n\
The arguments are @var{ca}, which summarizes all the previous\n\
-arguments; @var{mode}, the machine mode of the argument; @var{type},\n\
+arguments, @var{mode}, the machine mode of the argument, @var{type},\n\
the data type of the argument as a tree node or 0 if that is not known\n\
-(which happens for C support library functions); and @var{named},\n\
+(which happens for C support library functions), and @var{named},\n\
which is @code{true} for an ordinary argument and @code{false} for\n\
nameless arguments that correspond to @samp{@dots{}} in the called\n\
function's prototype. @var{type} can be an incomplete type if a\n\
@@ -24205,7 +24204,7 @@
The value of the expression can also be a @code{parallel} RTX@. This is\n\
used when an argument is passed in multiple locations. The mode of the\n\
@code{parallel} should be the mode of the entire argument. The\n\
-@code{parallel} holds any number of @code{expr_list} pairs; each one\n\
+@code{parallel} holds any number of @code{expr_list} pairs, each one\n\
describes where part of the argument is passed. In each\n\
@code{expr_list} the first operand must be a @code{reg} RTX for the hard\n\
register in which to pass this part of the argument, and the mode of the\n\
@@ -24281,7 +24280,7 @@
default_function_arg_round_boundary)
/* Return the diagnostic message string if function without a prototype
- is not allowed for this 'val' argument; NULL otherwise. */
+ is not allowed for this 'val' argument, NULL otherwise. */
DEFHOOK
(invalid_arg_for_unprototyped_fn,
"If defined, this macro returns the diagnostic message when it is\n\
@@ -24322,7 +24321,7 @@
@var{valtype} is a scalar type.\n\
\n\
If the precise function being called is known, @var{func} is a tree\n\
-node (@code{FUNCTION_DECL}) for it; otherwise, @var{func} is a null\n\
+node (@code{FUNCTION_DECL}) for it, otherwise, @var{func} is a null\n\
pointer. This makes it possible to use a different value-returning\n\
convention for specific functions when all their calls are\n\
known.\n\
@@ -24422,7 +24421,7 @@
hook_bool_void_true)
/* Return an rtx for the static chain for FNDECL_OR_TYPE. If INCOMING_P
- is true, then it should be for the callee; otherwise for the caller. */
+ is true, then it should be for the callee, otherwise for the caller. */
DEFHOOK
(static_chain,
"This hook replaces the use of @code{STATIC_CHAIN_REGNUM} et al for\n\
@@ -24452,8 +24451,8 @@
DEFHOOK
(trampoline_init,
"This hook is called to initialize a trampoline.\n\
-@var{m_tramp} is an RTX for the memory block for the trampoline; @var{fndecl}\n\
-is the @code{FUNCTION_DECL} for the nested function; @var{static_chain} is an\n\
+@var{m_tramp} is an RTX for the memory block for the trampoline, @var{fndecl}\n\
+is the @code{FUNCTION_DECL} for the nested function, @var{static_chain} is an\n\
RTX for the static chain value that should be passed to the function\n\
when it is called.\n\
\n\
@@ -24478,7 +24477,7 @@
memory block that was passed to @code{TARGET_TRAMPOLINE_INIT}. In case\n\
the address to be used for a function call should be different from the\n\
address at which the template was stored, the different address should\n\
-be returned; otherwise @var{addr} should be returned unchanged.\n\
+be returned, otherwise @var{addr} should be returned unchanged.\n\
If this hook is not defined, @var{addr} will be used for function calls.",
rtx, (rtx addr), NULL)
@@ -24795,7 +24794,7 @@
when compiling PIC)@. Scratch registers need not have the same mode\n\
as the value being copied, and usually hold a different value than\n\
that being copied. Special patterns in the md file are needed to\n\
-describe how the copy is performed with the help of the scratch register;\n\
+describe how the copy is performed with the help of the scratch register,\n\
these patterns also describe the number, register class(es) and mode(s)\n\
of the scratch register(s).\n\
\n\
@@ -24845,7 +24844,7 @@
\n\
@var{x} might be a pseudo-register or a @code{subreg} of a\n\
pseudo-register, which could either be in a hard register or in memory.\n\
-Use @code{true_regnum} to find out; it will return @minus{}1 if the pseudo is\n\
+Use @code{true_regnum} to find out, it will return @minus{}1 if the pseudo is\n\
in memory and the hard register number if it is in a register.\n\
\n\
Scratch operands in memory (constraint @code{\"=m\"} / @code{\"=&m\"}) are\n\
@@ -24869,7 +24868,7 @@
(preferred_reload_class,
"A target hook that places additional restrictions on the register class\n\
to use when it is necessary to copy value @var{x} into a register in class\n\
-@var{rclass}. The value is a register class; perhaps @var{rclass}, or perhaps\n\
+@var{rclass}. The value is a register class, perhaps @var{rclass}, or perhaps\n\
another, smaller class.\n\
\n\
The default version of this hook always returns value of @code{rclass} argument.\n\
@@ -25266,7 +25265,7 @@
hook_bool_void_true)
/* Returns true (the default) if the RTTI for the basic types,
- which is always defined in the C++ runtime, should be COMDAT;
+ which is always defined in the C++ runtime, should be COMDAT,
false if it should not be COMDAT. */
DEFHOOK
(library_rtti_comdat,
@@ -25897,18 +25896,18 @@
/* Common macros for target hook definitions.
Copyright (C) 2001-2017 Free Software Foundation, Inc.
- This program is free software; you can redistribute it and/or modify it
+ This program is free software, you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
- Free Software Foundation; either version 3, or (at your option) any
+ Free Software Foundation, either version 3, or (at your option) any
later version.
This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
+ but WITHOUT ANY WARRANTY, without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; see the file COPYING3. If not see
+ along with this program, see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* The following macros should be provided by the including file:
@@ -25936,7 +25935,7 @@
#define HOOK_VECTOR_1(NAME, FRAGMENT) HOOKSTRUCT (FRAGMENT)
#endif
#define HOOK_VECTOR(INIT_NAME, SNAME) HOOK_VECTOR_1 (INIT_NAME, struct SNAME {)
-#define HOOK_VECTOR_END(DECL_NAME) HOOK_VECTOR_1(,} DECL_NAME ;)
+#define HOOK_VECTOR_END(DECL_NAME) HOOK_VECTOR_1(,} DECL_NAME ,)
/* FIXME: For pre-existing hooks, we can't place the documentation in the
documentation field here till we get permission from the FSF to include
@@ -25966,7 +25965,7 @@
be used otherwise, but it has its use for exceptional cases where automatic
documentation is not wanted, and the real documentation is elsewere, like
for TARGET_ASM_{,UN}ALIGNED_INT_OP, which are hooks only for implementation
- purposes; they refer to structs, the components of which are documented as
+ purposes, they refer to structs, the components of which are documented as
separate hooks TARGET_ASM_{,UN}ALIGNED_[HSDT]I_OP.
A DOC string of 0 is for internal use of DEFHOOKPODX and special table
entries only. */
@@ -25977,18 +25976,18 @@
/* Target instruction definitions.
Copyright (C) 2015-2017 Free Software Foundation, Inc.
- This program is free software; you can redistribute it and/or modify it
+ This program is free software, you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
- Free Software Foundation; either version 3, or (at your option) any
+ Free Software Foundation, either version 3, or (at your option) any
later version.
This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
+ but WITHOUT ANY WARRANTY, without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; see the file COPYING3. If not see
+ along with this program, see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* This file has one entry for each public pattern name that the target
@@ -26085,18 +26084,18 @@
This file is part of GCC.
-GCC is free software; you can redistribute it and/or modify it under
+GCC is free software, you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
+Software Foundation, either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
+WARRANTY, without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
+along with GCC, see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef GCC_RTL_H
@@ -26135,7 +26134,7 @@
#include "rtl.def" /* rtl expressions are documented here */
#undef DEF_RTL_EXPR
- LAST_AND_UNUSED_RTX_CODE}; /* A convenient way to get a value for
+ LAST_AND_UNUSED_RTX_CODE}, /* A convenient way to get a value for
NUM_RTX_CODE.
Assumes default enum value assignment. */
@@ -26173,7 +26172,7 @@
RTX_TERNARY,
RTX_BITFIELD_OPS,
RTX_AUTOINC
-};
+},
#define RTX_OBJ_MASK (~1)
#define RTX_OBJ_RESULT (RTX_OBJ & RTX_OBJ_MASK)
@@ -26187,28 +26186,29 @@
#define RTX_COMMUTATIVE_RESULT (RTX_COMM_COMPARE & RTX_COMMUTATIVE_MASK)
#define RTX_NON_COMMUTATIVE_RESULT (RTX_COMPARE & RTX_COMMUTATIVE_MASK)
-extern const unsigned char rtx_length[NUM_RTX_CODE];
+extern const unsigned char rtx_length[NUM_RTX_CODE],
#define GET_RTX_LENGTH(CODE) (rtx_length[(int) (CODE)])
-extern const char * const rtx_name[NUM_RTX_CODE];
+extern const char * const rtx_name[NUM_RTX_CODE],
#define GET_RTX_NAME(CODE) (rtx_name[(int) (CODE)])
-extern const char * const rtx_format[NUM_RTX_CODE];
+extern const char * const rtx_format[NUM_RTX_CODE],
#define GET_RTX_FORMAT(CODE) (rtx_format[(int) (CODE)])
-extern const enum rtx_class rtx_class[NUM_RTX_CODE];
+extern const enum rtx_class rtx_class[NUM_RTX_CODE],
#define GET_RTX_CLASS(CODE) (rtx_class[(int) (CODE)])
/* True if CODE is part of the insn chain (i.e. has INSN_UID, PREV_INSN
and NEXT_INSN fields). */
#define INSN_CHAIN_CODE_P(CODE) IN_RANGE (CODE, DEBUG_INSN, NOTE)
-extern const unsigned char rtx_code_size[NUM_RTX_CODE];
-extern const unsigned char rtx_next[NUM_RTX_CODE];
+extern const unsigned char rtx_code_size[NUM_RTX_CODE],
+extern const unsigned char rtx_next[NUM_RTX_CODE],
\f
/* The flags and bitfields of an ADDR_DIFF_VEC. BASE is the base label
relative to which the offsets are calculated, as explained in rtl.def. */
struct addr_diff_vec_flags
+)
{
/* Set at the start of shorten_branches - ONLY WHEN OPTIMIZING - : */
unsigned min_align: 8;
@@ -27850,7 +27850,7 @@
/* Get the label that a LABEL_REF references. */
static inline rtx_insn *
-label_ref_label (const_rtx ref)
+label_ref_label ()
{
return as_a<rtx_insn *> (XCEXP (ref, 0, LABEL_REF));
}
@@ -27858,7 +27858,7 @@
/* Set the label that LABEL_REF ref refers to. */
static inline void
-set_label_ref_label (rtx ref, rtx_insn *label)
+set_label_ref_label ()
{
XCEXP (ref, 0, LABEL_REF) = label;
}
@@ -27881,14 +27881,14 @@
/* Force the REGNO macro to only be used on the lhs. */
static inline unsigned int
-rhs_regno (const_rtx x)
+rhs_regno ()
{
return REG_CHECK (x)->regno;
}
/* Return the final register in REG X plus one. */
static inline unsigned int
-END_REGNO (const_rtx x)
+END_REGNO ()
{
return REGNO (x) + REG_NREGS (x);
}
@@ -27896,7 +27896,7 @@
/* Change the REGNO and REG_NREGS of REG X to the specified values,
bypassing the df machinery. */
static inline void
-set_regno_raw (rtx x, unsigned int regno, unsigned int nregs)
+set_regno_raw ()
{
reg_info *reg = REG_CHECK (x);
reg->regno = regno;
@@ -27982,7 +27982,7 @@
/* Return true if CODE always has VOIDmode. */
static inline bool
-always_void_p (enum rtx_code code)
+always_void_p ()
{
return code == SET;
}
@@ -27997,7 +27997,7 @@
/* Initialize a full_rtx_costs structure C to the maximum cost. */
static inline void
-init_costs_to_max (struct full_rtx_costs *c)
+init_costs_to_max ()
{
c->speed = MAX_COST;
c->size = MAX_COST;
@@ -28005,7 +28005,7 @@
/* Initialize a full_rtx_costs structure C to zero cost. */
static inline void
-init_costs_to_zero (struct full_rtx_costs *c)
+init_costs_to_zero ()
{
c->speed = 0;
c->size = 0;
@@ -28028,7 +28028,7 @@
/* Increase both members of the full_rtx_costs structure C by the
cost of N insns. */
static inline void
-costs_add_n_insns (struct full_rtx_costs *c, int n)
+costs_add_n_insns ()
{
c->speed += COSTS_N_INSNS (n);
c->size += COSTS_N_INSNS (n);
@@ -28086,7 +28086,7 @@
/* Return the shape of a SUBREG rtx. */
static inline subreg_shape
-shape_of_subreg (const_rtx x)
+shape_of_subreg ()
{
return subreg_shape (GET_MODE (SUBREG_REG (x)),
SUBREG_BYTE (x), GET_MODE (x));
@@ -28744,7 +28744,7 @@
rather than size. */
static inline int
-set_rtx_cost (rtx x, bool speed_p)
+set_rtx_cost ()
{
return rtx_cost (x, VOIDmode, INSN, 4, speed_p);
}
@@ -28752,7 +28752,7 @@
/* Like set_rtx_cost, but return both the speed and size costs in C. */
static inline void
-get_full_set_rtx_cost (rtx x, struct full_rtx_costs *c)
+get_full_set_rtx_cost ()
{
get_full_rtx_cost (x, VOIDmode, INSN, 4, c);
}
@@ -28762,7 +28762,7 @@
than size. */
static inline int
-set_src_cost (rtx x, machine_mode mode, bool speed_p)
+set_src_cost ()
{
return rtx_cost (x, mode, SET, 1, speed_p);
}
@@ -28770,7 +28770,7 @@
/* Like set_src_cost, but return both the speed and size costs in C. */
static inline void
-get_full_set_src_cost (rtx x, machine_mode mode, struct full_rtx_costs *c)
+get_full_set_src_cost ()
{
get_full_rtx_cost (x, mode, SET, 1, c);
}
@@ -28820,7 +28820,7 @@
/* Return true if X is a vector constant with a duplicated element value. */
inline bool
-const_vec_duplicate_p (const_rtx x)
+const_vec_duplicate_p ()
{
return GET_CODE (x) == CONST_VECTOR && rtvec_all_equal_p (XVEC (x, 0));
}
@@ -28830,7 +28830,7 @@
template <typename T>
inline bool
-const_vec_duplicate_p (T x, T *elt)
+const_vec_duplicate_p ()
{
if (const_vec_duplicate_p (x))
{
@@ -28845,7 +28845,7 @@
template <typename T>
inline T
-unwrap_const_vec_duplicate (T x)
+unwrap_const_vec_duplicate ()
{
if (const_vec_duplicate_p (x))
x = CONST_VECTOR_ELT (x, 0);
@@ -28879,7 +28879,7 @@
/* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
inline unsigned int
-subreg_lowpart_offset (machine_mode outermode, machine_mode innermode)
+subreg_lowpart_offset ()
{
return subreg_size_lowpart_offset (GET_MODE_SIZE (outermode),
GET_MODE_SIZE (innermode));
@@ -28890,7 +28890,7 @@
/* Return the SUBREG_BYTE for an OUTERMODE highpart of an INNERMODE value. */
inline unsigned int
-subreg_highpart_offset (machine_mode outermode, machine_mode innermode)
+subreg_highpart_offset ()
{
return subreg_size_highpart_offset (GET_MODE_SIZE (outermode),
GET_MODE_SIZE (innermode));
@@ -29176,7 +29176,7 @@
/* Overload for refers_to_regno_p for checking a single register. */
inline bool
-refers_to_regno_p (unsigned int regnum, const_rtx x, rtx* loc = NULL)
+refers_to_regno_p ()
{
return refers_to_regno_p (regnum, regnum + 1, x, loc);
}
@@ -29439,7 +29439,7 @@
#ifndef GENERATOR_FILE
/* Return the attributes of a MEM rtx. */
static inline const struct mem_attrs *
-get_mem_attrs (const_rtx x)
+get_mem_attrs ()
{
struct mem_attrs *attrs;
@@ -29485,7 +29485,7 @@
#define PUT_MODE(RTX, MODE) PUT_MODE_RAW (RTX, MODE)
#else
static inline void
-PUT_MODE (rtx x, machine_mode mode)
+PUT_MODE ()
{
if (REG_P (x))
set_mode_and_regno (x, mode, REGNO (x));
@@ -29906,7 +29906,7 @@
otherwise. */
inline rtx_code
-load_extend_op (machine_mode mode)
+load_extend_op ()
{
if (SCALAR_INT_MODE_P (mode)
&& GET_MODE_PRECISION (mode) < BITS_PER_WORD)
@@ -30000,8 +30000,7 @@
/* Unknown, or no such operation; the enumeration constant should have
value zero. */
-DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", RTX_EXTRA)
-
+DEF_RTL_EXPR (
/* Used in the cselib routines to describe a value. Objects of this
kind are only allocated in cselib.c, in an alloc pool instead of in
GC memory. The only operand of a VALUE is a cselib_val.
@@ -30131,7 +30130,7 @@
2nd operand is the constraint for the output.
3rd operand is the number of the output this expression refers to.
When an insn stores more than one value, a separate ASM_OPERANDS
- is made for each output; this integer distinguishes them.
+ is made for each output, this integer distinguishes them.
4th is a vector of values of input operands.
5th is a vector of modes and constraints for the input operands.
Each element is an ASM_INPUT containing a constraint string
@@ -30170,7 +30169,7 @@
DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", RTX_EXTRA)
/* Vector of address differences X0 - BASE, X1 - BASE, ...
- First operand is BASE; the vector contains the X's.
+ First operand is BASE, the vector contains the X's.
The machine mode of this rtx says how much space to leave
for each difference and is adjusted by branch shortening if
CASE_VECTOR_SHORTEN_MODE is defined.
@@ -30196,7 +30195,7 @@
/* Memory prefetch, with attributes supported on some targets.
Operand 1 is the address of the memory to fetch.
Operand 2 is 1 for a write access, 0 otherwise.
- Operand 3 is the level of temporal locality; 0 means there is no
+ Operand 3 is the level of temporal locality, 0 means there is no
temporal locality and 1, 2, and 3 are for increasing levels of temporal
locality.
@@ -30276,7 +30275,7 @@
/* numeric floating point or integer constant. If the mode is
VOIDmode it is an int otherwise it has a floating point mode and a
floating point value. Operands hold the value. They are all 'w'
- and there may be from 2 to 6; see real.h. */
+ and there may be from 2 to 6, see real.h. */
DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, RTX_CONST_OBJ)
/* Describes a vector constant. */
@@ -30340,7 +30339,7 @@
insn chain. Every element of the CONCATN is the same size. */
DEF_RTL_EXPR(CONCATN, "concatn", "E", RTX_OBJ)
-/* A memory location; operand is the address. The second operand is the
+/* A memory location, operand is the address. The second operand is the
alias set to which this MEM belongs. We use `0' instead of `w' for this
field so that the field need not be specified in machine descriptions. */
DEF_RTL_EXPR(MEM, "mem", "e0", RTX_OBJ)
@@ -30358,7 +30357,7 @@
/* The condition code register is represented, in our imagination,
as a register holding a value that can be compared to zero.
In fact, the machine has already compared them and recorded the
- results; but instructions that look at the condition code
+ results, but instructions that look at the condition code
pretend to be looking at the entire value and comparing it. */
DEF_RTL_EXPR(CC0, "cc0", "", RTX_OBJ)
@@ -30690,7 +30689,7 @@
/* Pattern-matching operators: */
/* Use the function named by the second arg (the string)
- as a predicate; if matched, store the structure that was matched
+ as a predicate, if matched, store the structure that was matched
in the operand table at index specified by the first arg (the integer).
If the second arg is the null string, the structure is just stored.
@@ -30761,7 +30760,7 @@
second argument is present and nonempty, it is a sequence of digits
and/or letters which indicates the subexpression to test, using the
same syntax as genextract/genrecog's location strings: 0-9 for
- XEXP (op, n), a-z for XVECEXP (op, 0, n); each character applies to
+ XEXP (op, n), a-z for XVECEXP (op, 0, n), each character applies to
the result of the one before it. */
DEF_RTL_EXPR(MATCH_CODE, "match_code", "ss", RTX_MATCH)
@@ -30795,7 +30794,7 @@
3rd operand: template or C code to produce assembler output.
4: optionally, a vector of attributes for this insn.
- This form is deprecated; use define_peephole2 instead. */
+ This form is deprecated, use define_peephole2 instead. */
DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EsTV", RTX_EXTRA)
/* Definition of a split operation.
@@ -30913,7 +30912,7 @@
1: A C expression which evaluates to the appropriate register class for
this constraint. If this is not just a constant, it should look only
at -m switches and the like.
- 2: A docstring for this constraint, in Texinfo syntax; not currently
+ 2: A docstring for this constraint, in Texinfo syntax, not currently
used, in future will be incorporated into the manual's list of
machine-specific operand constraints. */
DEF_RTL_EXPR(DEFINE_REGISTER_CONSTRAINT, "define_register_constraint", "sss", RTX_EXTRA)
@@ -30938,7 +30937,7 @@
Operand:
0: The name of the constraint (often, but not always, a single letter).
- 1: A docstring for this constraint, in Texinfo syntax; not currently
+ 1: A docstring for this constraint, in Texinfo syntax, not currently
used, in future will be incorporated into the manual's list of
machine-specific operand constraints.
2: A boolean expression which computes whether or not the constraint
@@ -31275,18 +31274,18 @@
This file is part of GCC.
-GCC is free software; you can redistribute it and/or modify it under
+GCC is free software, you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
+Software Foundation, either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
+WARRANTY, without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
+along with GCC, see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* This file defines all the codes that may appear on individual
@@ -31317,7 +31316,7 @@
/* The REG is autoincremented or autodecremented in this insn. */
REG_NOTE (INC)
-/* Describes the insn as a whole; it says that the insn sets a
+/* Describes the insn as a whole, it says that the insn sets a
register to a constant value or to be equivalent to a memory
address. If the register is spilled to the stack then the constant
value should be substituted for it. The contents of the REG_EQUIV
@@ -31330,7 +31329,7 @@
/* Like REG_EQUIV except that the destination is only momentarily
equal to the specified rtx. Therefore, it cannot be used for
- substitution; but it can be used for cse. */
+ substitution, but it can be used for cse. */
REG_NOTE (EQUAL)
/* The register is always nonnegative during the containing loop.
@@ -31377,7 +31376,7 @@
this call won't return. */
REG_NOTE (BR_PROB)
-/* Attached to a call insn; indicates that the call is malloc-like and
+/* Attached to a call insn, indicates that the call is malloc-like and
that the pointer returned cannot alias anything else. */
REG_NOTE (NOALIAS)
@@ -31396,7 +31395,7 @@
for FRAME_RELATED_EXPR intuition. The insn's first pattern must be
a SET, and the destination must be the CFA register. The attached
rtx is an expression that defines the CFA. In the simplest case, the
- rtx could be just the stack_pointer_rtx; more common would be a PLUS
+ rtx could be just the stack_pointer_rtx, more common would be a PLUS
with a base register and a constant offset. In the most complicated
cases, this will result in a DW_CFA_def_cfa_expression with the rtx
expression rendered in a dwarf location expression. */
@@ -31504,18 +31503,18 @@
This file is part of GCC.
-GCC is free software; you can redistribute it and/or modify it under
+GCC is free software, you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
+Software Foundation, either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-WARRANTY; without even the implied warranty of MERCHANTABILITY or
+WARRANTY, without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING3. If not see
+along with GCC, see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* This file defines all the codes that may appear in the
@@ -31598,18 +31597,18 @@
This file is part of GCC.
-GCC is free software; you can redistribute it and/or modify it under
+GCC is free software, you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
-Software Foundation; either version 3, or (at your option) any later
+Software Foundation, either version 3, or (at your option) any later
version.
next prev parent reply other threads:[~2017-05-31 12:37 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-31 22:11 [PATCH] Support multiline GTY markers in Doxygen filter; " David Malcolm
2013-11-01 15:16 ` Diego Novillo
2017-03-17 1:21 ` [PATCH 1/2] Port Doxygen support script from Perl to Python; " David Malcolm
2017-03-17 1:21 ` [PATCH 2/2] filter_params.py: GTY fix and other cleanups David Malcolm
2017-04-28 12:25 ` [PATCH 1/2] Port Doxygen support script from Perl to Python; add unittests Martin Liška
2017-05-03 9:49 ` [PATCH] Doxygen: add default location for filters and output folder Martin Liška
2017-05-31 12:43 ` Martin Liška [this message]
2017-04-28 12:30 ` [PATCH 1/2] Change comment style to one we normally use Martin Liška
2017-04-28 12:41 ` [PATCH 2/2] Doxygen: transform ENUM_BITFIELD and comments starting with '/**' Martin Liška
2017-04-29 2:57 ` [PING] Re: [PATCH 1/2] Port Doxygen support script from Perl to Python; add unittests David Malcolm
2017-05-19 9:14 ` Martin Liška
2017-05-26 19:35 ` [PING^2] " David Malcolm
2017-05-31 14:07 ` [PATCH] " Martin Liška
2017-05-31 14:10 ` Martin Liška
2017-05-31 14:13 ` Martin Liška
2017-06-22 12:45 ` Martin Liška
2017-06-28 4:41 ` Jeff Law
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