From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id F263D3858C54 for ; Wed, 13 Jul 2022 21:39:32 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org F263D3858C54 Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 26DLKT9K004989; Wed, 13 Jul 2022 21:39:32 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0b-001b2d01.pphosted.com (PPS) with ESMTPS id 3ha5vng8kg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 13 Jul 2022 21:39:32 +0000 Received: from m0098416.ppops.net (m0098416.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 26DLcfCL019622; Wed, 13 Jul 2022 21:39:31 GMT Received: from ppma01dal.us.ibm.com (83.d6.3fa9.ip4.static.sl-reverse.com [169.63.214.131]) by mx0b-001b2d01.pphosted.com (PPS) with ESMTPS id 3ha5vng8k8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 13 Jul 2022 21:39:31 +0000 Received: from pps.filterd (ppma01dal.us.ibm.com [127.0.0.1]) by ppma01dal.us.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 26DLKGMM014130; Wed, 13 Jul 2022 21:39:30 GMT Received: from b03cxnp08028.gho.boulder.ibm.com (b03cxnp08028.gho.boulder.ibm.com [9.17.130.20]) by ppma01dal.us.ibm.com with ESMTP id 3h71aa6evg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 13 Jul 2022 21:39:30 +0000 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 26DLdTxQ42729860 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 13 Jul 2022 21:39:29 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AF5C8BE04F; Wed, 13 Jul 2022 21:39:29 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 20BA7BE051; Wed, 13 Jul 2022 21:39:29 +0000 (GMT) Received: from lexx (unknown [9.160.8.243]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP; Wed, 13 Jul 2022 21:39:28 +0000 (GMT) Message-ID: Subject: [PATCH, rs6000] Additional cleanup of rs6000_builtin_mask From: will schmidt To: GCC Patches Cc: Segher Boessenkool , "Kewen.Lin" , David Edelsohn Date: Wed, 13 Jul 2022 16:39:28 -0500 Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5 (3.28.5-18.el8) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: N9WZHb-mFOAr7IOlPq-H0HD4KzaAfPH4 X-Proofpoint-GUID: wiUp8T7JIZblyS5qbUCB7YU1o25IjGNA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-13_11,2022-07-13_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 mlxlogscore=999 adultscore=0 spamscore=0 priorityscore=1501 phishscore=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2206140000 definitions=main-2207130089 X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 13 Jul 2022 21:39:35 -0000 [PATCH, rs6000] Additional cleanup of rs6000_builtin_mask Hi, Post the rs6000 builtins rewrite, some of the leftover builtin code is redundant and can be removed. This replaces the remaining usage of bu_mask in rs6000_target_modify_macros() with checks against the rs6000_cpu directly. Thusly the bu_mask variable can be removed. After that variable is eliminated there are no other uses of rs6000_builtin_mask_calculate(), so that function can also be safely removed. I have tested this on current systems (P8,P9,P10) without regressions. OK for trunk? Thanks, -Will gcc/ * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Remove bu_mask references. (rs6000_define_or_undefine_macro): Replace bu_mask reference with a rs6000_cpu value check. (rs6000_cpu_cpp_builtins): Remove rs6000_builtin_mask_calculate() parameter from call to rs6000_target_modify_macros. * config/rs6000/rs6000-protos.h (rs6000_target_modify_macros, rs6000_target_modify_macros_ptr): Remove parameter from extern for the prototype. * config/rs6000/rs6000.cc (rs6000_target_modify_macros_ptr): Remove parameter from prototype, update calls to this function. (rs6000_print_builtin_options): Remove prototype, call and function. (rs6000_builtin_mask_calculate): Remove function. (rs6000_debug_reg_global): Remove call to rs6000_print_builtin_options. (rs6000_option_override_internal): Remove rs6000_builtin_mask var and builtin_mask debug output. (rs6000_pragma_target_parse): Update calls to rs6000_target_modify_ptr. diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc index 0d13645040ff..4d051b906582 100644 --- a/gcc/config/rs6000/rs6000-c.cc +++ b/gcc/config/rs6000/rs6000-c.cc @@ -333,24 +333,20 @@ rs6000_define_or_undefine_macro (bool define_p, const char *name) else cpp_undef (parse_in, name); } /* Define or undefine macros based on the current target. If the user does - #pragma GCC target, we need to adjust the macros dynamically. Note, some of - the options needed for builtins have been moved to separate variables, so - have both the target flags and the builtin flags as arguments. */ + #pragma GCC target, we need to adjust the macros dynamically. */ void -rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags, - HOST_WIDE_INT bu_mask) +rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags) { if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET) fprintf (stderr, - "rs6000_target_modify_macros (%s, " HOST_WIDE_INT_PRINT_HEX - ", " HOST_WIDE_INT_PRINT_HEX ")\n", + "rs6000_target_modify_macros (%s, " HOST_WIDE_INT_PRINT_HEX ")\n", (define_p) ? "define" : "undef", - flags, bu_mask); + flags); /* Each of the flags mentioned below controls whether certain preprocessor macros will be automatically defined when preprocessing source files for compilation by this compiler. While most of these flags can be enabled or disabled @@ -593,14 +589,12 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags, /* OPTION_MASK_FLOAT128_HARDWARE can be turned on if -mcpu=power9 is used or via the target attribute/pragma. */ if ((flags & OPTION_MASK_FLOAT128_HW) != 0) rs6000_define_or_undefine_macro (define_p, "__FLOAT128_HARDWARE__"); - /* options from the builtin masks. */ - /* Note that OPTION_MASK_FPRND is enabled only if - (rs6000_cpu == PROCESSOR_CELL) (e.g. -mcpu=cell). */ - if ((bu_mask & OPTION_MASK_FPRND) != 0) + /* Tell the user if we are targeting CELL. */ + if (rs6000_cpu == PROCESSOR_CELL) rs6000_define_or_undefine_macro (define_p, "__PPU__"); /* Tell the user if we support the MMA instructions. */ if ((flags & OPTION_MASK_MMA) != 0) rs6000_define_or_undefine_macro (define_p, "__MMA__"); @@ -614,12 +608,11 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags, void rs6000_cpu_cpp_builtins (cpp_reader *pfile) { /* Define all of the common macros. */ - rs6000_target_modify_macros (true, rs6000_isa_flags, - rs6000_builtin_mask_calculate ()); + rs6000_target_modify_macros (true, rs6000_isa_flags); if (TARGET_FRE) builtin_define ("__RECIP__"); if (TARGET_FRES) builtin_define ("__RECIPF__"); diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 3ea010236090..b3c16e7448d8 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -318,13 +318,12 @@ extern void rs6000_pragma_longcall (struct cpp_reader *); extern void rs6000_cpu_cpp_builtins (struct cpp_reader *); #ifdef TREE_CODE extern bool rs6000_pragma_target_parse (tree, tree); #endif extern void rs6000_activate_target_options (tree new_tree); -extern void rs6000_target_modify_macros (bool, HOST_WIDE_INT, HOST_WIDE_INT); -extern void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT, - HOST_WIDE_INT); +extern void rs6000_target_modify_macros (bool, HOST_WIDE_INT); +extern void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT); /* Declare functions in rs6000-d.cc */ extern void rs6000_d_target_versions (void); extern void rs6000_d_register_target_info (void); diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 3ff16b8ae04d..5fda18d82795 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -276,11 +276,11 @@ const char *tcb_verification_symbol = "__parse_hwcap_and_convert_at_platform"; bool cpu_builtin_p = false; /* Pointer to function (in rs6000-c.cc) that can define or undefine target macros that have changed. Languages that don't support the preprocessor don't link in rs6000-c.cc, so we can't call it directly. */ -void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT, HOST_WIDE_INT); +void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT); /* Simplfy register classes into simpler classifications. We assume GPR_REG_TYPE - FPR_REG_TYPE are ordered so that we can use a simple range check for standard register classes (gpr/floating/altivec/vsx) and floating/vector classes (float/altivec/vsx). */ @@ -1169,12 +1169,10 @@ enum reg_class (*rs6000_preferred_reload_class_ptr) (rtx, enum reg_class) const int INSN_NOT_AVAILABLE = -1; static void rs6000_print_isa_options (FILE *, int, const char *, HOST_WIDE_INT); -static void rs6000_print_builtin_options (FILE *, int, const char *, - HOST_WIDE_INT); static HOST_WIDE_INT rs6000_disable_incompatible_switches (void); static enum rs6000_reg_type register_to_reg_type (rtx, bool *); static bool rs6000_secondary_reload_move (enum rs6000_reg_type, enum rs6000_reg_type, @@ -2405,13 +2403,10 @@ rs6000_debug_reg_global (void) rs6000_isa_flags); rs6000_print_isa_options (stderr, 0, "rs6000_isa_flags_explicit", rs6000_isa_flags_explicit); - rs6000_print_builtin_options (stderr, 0, "rs6000_builtin_mask", - rs6000_builtin_mask); - rs6000_print_isa_options (stderr, 0, "TARGET_DEFAULT", TARGET_DEFAULT); fprintf (stderr, DEBUG_FMT_S, "--with-cpu default", OPTION_TARGET_CPU_DEFAULT ? OPTION_TARGET_CPU_DEFAULT : ""); @@ -3370,45 +3365,10 @@ darwin_rs6000_override_options (void) #ifndef RS6000_DEFAULT_LONG_DOUBLE_SIZE #define RS6000_DEFAULT_LONG_DOUBLE_SIZE 64 #endif -/* Return the builtin mask of the various options used that could affect which - builtins were used. In the past we used target_flags, but we've run out of - bits, and some options are no longer in target_flags. */ - -HOST_WIDE_INT -rs6000_builtin_mask_calculate (void) -{ - return (((TARGET_ALTIVEC) ? OPTION_MASK_ALTIVEC : 0) - | ((TARGET_CMPB) ? OPTION_MASK_CMPB : 0) - | ((TARGET_VSX) ? OPTION_MASK_VSX : 0) - | ((TARGET_FRE) ? OPTION_MASK_POPCNTB : 0) - | ((TARGET_FRES) ? OPTION_MASK_PPC_GFXOPT : 0) - | ((TARGET_FRSQRTE) ? OPTION_MASK_PPC_GFXOPT : 0) - | ((TARGET_FRSQRTES) ? OPTION_MASK_POPCNTB : 0) - | ((TARGET_POPCNTD) ? OPTION_MASK_POPCNTD : 0) - | ((rs6000_cpu == PROCESSOR_CELL) ? OPTION_MASK_FPRND : 0) - | ((TARGET_P8_VECTOR) ? OPTION_MASK_P8_VECTOR : 0) - | ((TARGET_P9_VECTOR) ? OPTION_MASK_P9_VECTOR : 0) - | ((TARGET_P9_MISC) ? OPTION_MASK_P9_MISC : 0) - | ((TARGET_MODULO) ? OPTION_MASK_MODULO : 0) - | ((TARGET_64BIT) ? MASK_64BIT : 0) - | ((TARGET_POWERPC64) ? MASK_POWERPC64 : 0) - | ((TARGET_CRYPTO) ? OPTION_MASK_CRYPTO : 0) - | ((TARGET_HTM) ? OPTION_MASK_HTM : 0) - | ((TARGET_DFP) ? OPTION_MASK_DFP : 0) - | ((TARGET_HARD_FLOAT) ? OPTION_MASK_SOFT_FLOAT : 0) - | ((TARGET_LONG_DOUBLE_128 - && TARGET_HARD_FLOAT - && !TARGET_IEEEQUAD) ? OPTION_MASK_MULTIPLE : 0) - | ((TARGET_FLOAT128_TYPE) ? OPTION_MASK_FLOAT128_KEYWORD : 0) - | ((TARGET_FLOAT128_HW) ? OPTION_MASK_FLOAT128_HW : 0) - | ((TARGET_MMA) ? OPTION_MASK_MMA : 0) - | ((TARGET_POWER10) ? OPTION_MASK_POWER10 : 0)); -} - /* Implement TARGET_MD_ASM_ADJUST. All asm statements are considered to clobber the XER[CA] bit because clobbering that bit without telling the compiler worked just fine with versions of GCC before GCC 5, and breaking a lot of older code in ways that are hard to track down is not such a great idea. */ @@ -3616,15 +3576,10 @@ glibc_supports_ieee_128bit (void) compilation efforts. This has the effect of also turning on the associated TARGET_XXX values since these are macros which are generally defined to test the corresponding bit of the rs6000_isa_flags variable. - The variable rs6000_builtin_mask is set to represent the target - options for the most current compilation efforts, consistent with - the current contents of rs6000_isa_flags. This variable controls - expansion of built-in functions. - Various other global variables and fields of global structures (over 50 in all) are initialized to reflect the desired options for the most current compilation efforts. */ static bool @@ -4888,18 +4843,10 @@ rs6000_option_override_internal (bool global_init_p) else rs6000_recip_control |= mask; } } - /* Set the builtin mask of the various options used that could affect which - builtins were used. In the past we used target_flags, but we've run out - of bits, and some options are no longer in target_flags. */ - rs6000_builtin_mask = rs6000_builtin_mask_calculate (); - if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET) - rs6000_print_builtin_options (stderr, 0, "builtin mask", - rs6000_builtin_mask); - /* Initialize all of the registers. */ rs6000_init_hard_regno_mode_ok (global_init_p); /* Save the initial options in case the user does function specific options */ if (global_init_p) @@ -24495,17 +24442,15 @@ rs6000_pragma_target_parse (tree args, tree pop_target) if ((diff_flags != 0) || (diff_bumask != 0)) { /* Delete old macros. */ rs6000_target_modify_macros_ptr (false, - prev_flags & diff_flags, - prev_bumask & diff_bumask); + prev_flags & diff_flags); /* Define new macros. */ rs6000_target_modify_macros_ptr (true, - cur_flags & diff_flags, - cur_bumask & diff_bumask); + cur_flags & diff_flags); } } return true; } @@ -24732,19 +24677,10 @@ rs6000_print_isa_options (FILE *file, int indent, const char *string, rs6000_print_options_internal (file, indent, string, flags, "-m", &rs6000_opt_masks[0], ARRAY_SIZE (rs6000_opt_masks)); } -static void -rs6000_print_builtin_options (FILE *file, int indent, const char *string, - HOST_WIDE_INT flags) -{ - rs6000_print_options_internal (file, indent, string, flags, "", - &rs6000_builtin_mask_names[0], - ARRAY_SIZE (rs6000_builtin_mask_names)); -} - /* If the user used -mno-vsx, we need turn off all of the implicit ISA 2.06, 2.07, and 3.0 options that relate to the vector unit (-mdirect-move, -mupper-regs-df, etc.). If the user used -mno-power8-vector, we need to turn off all of the implicit