* [0/5] C-SKY port v2
@ 2018-07-30 16:47 Sandra Loosemore
2018-07-30 16:50 ` [1/5] C-SKY port v2: Configury Sandra Loosemore
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Sandra Loosemore @ 2018-07-30 16:47 UTC (permalink / raw)
To: gcc-patches; +Cc: Xianmiao Qu, Yunhai Shang, Jeff Law
This patch series is a revised version of the C-SKY port, taking into
account review comments received so far on the initial patch set. The
changes made are:
- Removed excess whitespace in predicates.md and other places (part 2).
- Defined TARGET_CUSTOM_FUNCTION_DESCRIPTORS (part 2).
- Moved cse_cc pass later (part 2) and added a test case (part 4).
- Fixed libgcc alphabetization problem (part 5).
Parts 1 and 3 are unchanged (and already approved) but I've included
them for completeness.
For more background on this target, see the initial patch posting here.
https://gcc.gnu.org/ml/gcc-patches/2018-07/msg01289.html
I also have a patch with draft changes for the web site that I'll post
separately.
-Sandra
^ permalink raw reply [flat|nested] 6+ messages in thread
* [1/5] C-SKY port v2: Configury
2018-07-30 16:47 [0/5] C-SKY port v2 Sandra Loosemore
@ 2018-07-30 16:50 ` Sandra Loosemore
2018-07-30 16:51 ` [2/5] C-SKY port v2: Backend implementation Sandra Loosemore
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Sandra Loosemore @ 2018-07-30 16:50 UTC (permalink / raw)
To: gcc-patches; +Cc: Xianmiao Qu, Yunhai Shang, Jeff Law
[-- Attachment #1: Type: text/plain, Size: 541 bytes --]
2018-07-30 Jojo <jijie_rong@c-sky.com>
Huibin Wang <huibin_wang@c-sky.com>
Sandra Loosemore <sandra@codesourcery.com>
Chung-Lin Tang <cltang@codesourcery.com>
Andrew Jenner <andrew@codesourcery.com>
C-SKY port: Configury
gcc/
* config.gcc (csky-*-*): New.
* configure.ac: Add csky to targets for dwarf2 debug_line support.
* configure: Regenerated.
contrib/
* config-list.mk (LIST): Add csky-elf and csky-linux-gnu.
[-- Attachment #2: csky-gcc-1.patch --]
[-- Type: text/x-patch, Size: 3908 bytes --]
diff --git a/contrib/config-list.mk b/contrib/config-list.mk
index c3537d2..d9e48a9 100644
--- a/contrib/config-list.mk
+++ b/contrib/config-list.mk
@@ -40,6 +40,7 @@ LIST = aarch64-elf aarch64-linux-gnu aarch64-rtems \
arm-symbianelf avr-elf \
bfin-elf bfin-uclinux bfin-linux-uclibc bfin-rtems bfin-openbsd \
c6x-elf c6x-uclinux cr16-elf cris-elf cris-linux crisv32-elf crisv32-linux \
+ csky-elf csky-linux-gnu \
epiphany-elf epiphany-elfOPT-with-stack-offset=16 fido-elf \
fr30-elf frv-elf frv-linux ft32-elf h8300-elf hppa-linux-gnu \
hppa-linux-gnuOPT-enable-sjlj-exceptions=yes hppa64-linux-gnu \
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 78e84c2..cd98836 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1278,6 +1278,70 @@ crisv32-*-linux* | cris-*-linux*)
;;
esac
;;
+csky-*-*)
+ if test x${with_endian} != x; then
+ case ${with_endian} in
+ big|little) ;;
+ *)
+ echo "with_endian=${with_endian} not supported."
+ exit 1
+ ;;
+ esac
+ fi
+ if test x${with_float} != x; then
+ case ${with_float} in
+ soft | hard) ;;
+ *) echo
+ "Unknown floating point type used in --with-float=$with_float"
+ exit 1
+ ;;
+ esac
+ fi
+ tm_file="csky/csky.h"
+ md_file="csky/csky.md"
+ out_file="csky/csky.c"
+ tm_p_file="${tm_p_file} csky/csky-protos.h"
+ extra_options="${extra_options} csky/csky_tables.opt"
+
+ if test x${enable_tpf_debug} = xyes; then
+ tm_defines="${tm_defines} ENABLE_TPF_DEBUG"
+ fi
+
+ case ${target} in
+ csky-*-elf*)
+ tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file} csky/csky-elf.h"
+ tmake_file="csky/t-csky csky/t-csky-elf"
+ default_use_cxa_atexit=no
+ ;;
+ csky-*-linux*)
+ tm_file="dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h ${tm_file} csky/csky-linux-elf.h"
+ tmake_file="${tmake_file} csky/t-csky csky/t-csky-linux"
+
+ if test "x${enable_multilib}" = xyes ; then
+ tm_file="$tm_file ./sysroot-suffix.h"
+ tmake_file="${tmake_file} csky/t-sysroot-suffix"
+ fi
+
+ case ${target} in
+ csky-*-linux-gnu*)
+ tm_defines="$tm_defines DEFAULT_LIBC=LIBC_GLIBC"
+ ;;
+ csky-*-linux-uclibc*)
+ tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC"
+ default_use_cxa_atexit=no
+ ;;
+ *)
+ echo "Unknown target $target"
+ exit 1
+ ;;
+ esac
+ ;;
+ *)
+ echo "Unknown target $target"
+ exit 1
+ ;;
+ esac
+ ;;
epiphany-*-elf | epiphany-*-rtems*)
tm_file="${tm_file} dbxelf.h elfos.h"
tmake_file="${tmake_file} epiphany/t-epiphany"
@@ -3831,6 +3895,10 @@ case "${target}" in
fi
;;
+ csky-*-*)
+ supported_defaults="cpu endian float"
+ ;;
+
arm*-*-*)
supported_defaults="arch cpu float tune fpu abi mode tls"
for which in cpu tune arch; do
diff --git a/gcc/configure b/gcc/configure
index 80ac4a3..b7a8e36 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -27838,7 +27838,7 @@ esac
# ??? Once 2.11 is released, probably need to add first known working
# version to the per-target configury.
case "$cpu_type" in
- aarch64 | alpha | arc | arm | avr | bfin | cris | i386 | m32c | m68k \
+ aarch64 | alpha | arc | arm | avr | bfin | cris | csky | i386 | m32c | m68k \
| microblaze | mips | nios2 | pa | riscv | rs6000 | score | sparc | spu \
| tilegx | tilepro | visium | xstormy16 | xtensa)
insn="nop"
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 4fc851c..65f9c92 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -4932,7 +4932,7 @@ esac
# ??? Once 2.11 is released, probably need to add first known working
# version to the per-target configury.
case "$cpu_type" in
- aarch64 | alpha | arc | arm | avr | bfin | cris | i386 | m32c | m68k \
+ aarch64 | alpha | arc | arm | avr | bfin | cris | csky | i386 | m32c | m68k \
| microblaze | mips | nios2 | pa | riscv | rs6000 | score | sparc | spu \
| tilegx | tilepro | visium | xstormy16 | xtensa)
insn="nop"
^ permalink raw reply [flat|nested] 6+ messages in thread
* [2/5] C-SKY port v2: Backend implementation
2018-07-30 16:47 [0/5] C-SKY port v2 Sandra Loosemore
2018-07-30 16:50 ` [1/5] C-SKY port v2: Configury Sandra Loosemore
@ 2018-07-30 16:51 ` Sandra Loosemore
2018-07-30 16:52 ` [3/5] C-SKY port v2: Documentation Sandra Loosemore
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Sandra Loosemore @ 2018-07-30 16:51 UTC (permalink / raw)
To: gcc-patches; +Cc: Xianmiao Qu, Yunhai Shang, Jeff Law
[-- Attachment #1: Type: text/plain, Size: 332 bytes --]
2018-07-30 Jojo <jijie_rong@c-sky.com>
Huibin Wang <huibin_wang@c-sky.com>
Sandra Loosemore <sandra@codesourcery.com>
Chung-Lin Tang <cltang@codesourcery.com>
C-SKY port: Backend implementation
gcc/
* config/csky/*: New.
* common/config/csky/*: New.
[-- Attachment #2: csky-gcc-2.patch.gz --]
[-- Type: application/gzip, Size: 91264 bytes --]
^ permalink raw reply [flat|nested] 6+ messages in thread
* [3/5] C-SKY port v2: Documentation
2018-07-30 16:47 [0/5] C-SKY port v2 Sandra Loosemore
2018-07-30 16:50 ` [1/5] C-SKY port v2: Configury Sandra Loosemore
2018-07-30 16:51 ` [2/5] C-SKY port v2: Backend implementation Sandra Loosemore
@ 2018-07-30 16:52 ` Sandra Loosemore
2018-07-30 16:53 ` [4/5] C-SKY port v2: Testsuite Sandra Loosemore
2018-07-30 16:54 ` [5/5] C-SKY port v2: libgcc Sandra Loosemore
4 siblings, 0 replies; 6+ messages in thread
From: Sandra Loosemore @ 2018-07-30 16:52 UTC (permalink / raw)
To: gcc-patches; +Cc: Xianmiao Qu, Yunhai Shang, Jeff Law
[-- Attachment #1: Type: text/plain, Size: 353 bytes --]
2018-07-30 Sandra Loosemore <sandra@codesourcery.com>
C-SKY port: Documentation
gcc/
* doc/extend.texi (C-SKY Function Attributes): New section.
* doc/invoke.texi (Option Summary): Add C-SKY options.
(C-SKY Options): New section.
* doc/md.texi (Machine Constraints): Document C-SKY constraints.
[-- Attachment #2: csky-gcc-3.patch --]
[-- Type: text/x-patch, Size: 10376 bytes --]
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index c7745c4..71c1d01 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -2324,6 +2324,7 @@ GCC plugins may provide their own attributes.
* AVR Function Attributes::
* Blackfin Function Attributes::
* CR16 Function Attributes::
+* C-SKY Function Attributes::
* Epiphany Function Attributes::
* H8/300 Function Attributes::
* IA-64 Function Attributes::
@@ -4145,6 +4146,38 @@ function entry and exit sequences suitable for use in an interrupt handler
when this attribute is present.
@end table
+@node C-SKY Function Attributes
+@subsection C-SKY Function Attributes
+
+These function attributes are supported by the C-SKY back end:
+
+@table @code
+@item interrupt
+@itemx isr
+@cindex @code{interrupt} function attribute, C-SKY
+@cindex @code{isr} function attribute, C-SKY
+Use these attributes to indicate that the specified function
+is an interrupt handler.
+The compiler generates function entry and exit sequences suitable for
+use in an interrupt handler when either of these attributes are present.
+
+Use of these options requires the @option{-mistack} command-line option
+to enable support for the necessary interrupt stack instructions. They
+are ignored with a warning otherwise. @xref{C-SKY Options}.
+
+@item naked
+@cindex @code{naked} function attribute, C-SKY
+This attribute allows the compiler to construct the
+requisite function declaration, while allowing the body of the
+function to be assembly code. The specified function will not have
+prologue/epilogue sequences generated by the compiler. Only basic
+@code{asm} statements can safely be included in naked functions
+(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
+basic @code{asm} and C code may appear to work, they cannot be
+depended upon to work reliably and are not supported.
+@end table
+
+
@node Epiphany Function Attributes
@subsection Epiphany Function Attributes
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index e0e59f6..75e147e 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -703,6 +703,16 @@ Objective-C and Objective-C++ Dialects}.
-msim -mint32 -mbit-ops
-mdata-model=@var{model}}
+@emph{C-SKY Options}
+@gccoptlist{-march=@var{arch} -mcpu=@var{cpu} @gol
+-mbig-endian -EB -mlittle-endian -EL @gol
+-mhard-float -msoft-float -mfpu=@var{fpu} -mdouble-float -mfdivdu @gol
+-melrw -mistack -mmp -mcp -mcache -msecurity -mtrust @gol
+-mdsp -medsp -mvdsp @gol
+-mdiv -msmart -mhigh-registers -manchor @gol
+-mpushpop -mmultiple-stld -mconstpool -mstack-size -mccrt @gol
+-mbranch-cost=@var{n} -mcse-cc -msched-prolog}
+
@emph{Darwin Options}
@gccoptlist{-all_load -allowable_client -arch -arch_errors_fatal @gol
-arch_only -bind_at_load -bundle -bundle_loader @gol
@@ -14468,6 +14478,7 @@ platform.
* C6X Options::
* CRIS Options::
* CR16 Options::
+* C-SKY Options::
* Darwin Options::
* DEC Alpha Options::
* FR30 Options::
@@ -17581,6 +17592,205 @@ However, @samp{far} is not valid with @option{-mcr16c}, as the
CR16C architecture does not support the far data model.
@end table
+@node C-SKY Options
+@subsection C-SKY Options
+@cindex C-SKY Options
+
+GCC supports these options when compiling for C-SKY V2 processors.
+
+@table @gcctabopt
+
+@item -march=@var{arch}
+@opindex march=
+Specify the C-SKY target architecture. Valid values for @var{arch} are:
+@samp{ck801}, @samp{ck802}, @samp{ck803}, @samp{ck807}, and @samp{ck810}.
+The default is @samp{ck810}.
+
+@item -mcpu=@var{cpu}
+@opindex mcpu=
+Specify the C-SKY target processor. Valid values for @var{cpu} are:
+@samp{ck801}, @samp{ck801t},
+@samp{ck802}, @samp{ck802t}, @samp{ck802j},
+@samp{ck803}, @samp{ck803h}, @samp{ck803t}, @samp{ck803ht},
+@samp{ck803f}, @samp{ck803fh}, @samp{ck803e}, @samp{ck803eh},
+@samp{ck803et}, @samp{ck803eht}, @samp{ck803ef}, @samp{ck803efh},
+@samp{ck803ft}, @samp{ck803eft}, @samp{ck803efht}, @samp{ck803r1},
+@samp{ck803hr1}, @samp{ck803tr1}, @samp{ck803htr1}, @samp{ck803fr1},
+@samp{ck803fhr1}, @samp{ck803er1}, @samp{ck803ehr1}, @samp{ck803etr1},
+@samp{ck803ehtr1}, @samp{ck803efr1}, @samp{ck803efhr1}, @samp{ck803ftr1},
+@samp{ck803eftr1}, @samp{ck803efhtr1},
+@samp{ck803s}, @samp{ck803st}, @samp{ck803se}, @samp{ck803sf},
+@samp{ck803sef}, @samp{ck803seft},
+@samp{ck807e}, @samp{ck807ef}, @samp{ck807}, @samp{ck807f},
+@samp{ck810e}, @samp{ck810et}, @samp{ck810ef}, @samp{ck810eft},
+@samp{ck810}, @samp{ck810v}, @samp{ck810f}, @samp{ck810t}, @samp{ck810fv},
+@samp{ck810tv}, @samp{ck810ft}, and @samp{ck810ftv}.
+
+@item -mbig-endian
+@opindex mbig-endian
+@itemx -EB
+@opindex -EB
+@itemx -mlittle-endian
+@opindex mlittle-endian
+@itemx -EL
+@opindex -EL
+
+Select big- or little-endian code. The default is little-endian.
+
+@item -mhard-float
+@opindex mhard-float
+@itemx -msoft-float
+@opindex msoft-float
+
+Select hardware or software floating-point implementations.
+The default is soft float.
+
+@item -mdouble-float
+@itemx -mno-double-float
+@opindex mdouble-float
+When @option{-mhard-float} is in effect, enable generation of
+double-precision float instructions. This is the default except
+when compiling for CK803.
+
+@item -mfdivdu
+@itemx -mno-fdivdu
+@opindex mfdivdu
+When @option{-mhard-float} is in effect, enable generation of
+@code{frecipd}, @code{fsqrtd}, and @code{fdivd} instructions.
+This is the default except when compiling for CK803.
+
+@item -mfpu=@var{fpu}
+@opindex mfpu=
+Select the floating-point processor. This option can only be used with
+@option{-mhard-float}.
+Values for @var{fpu} are
+@samp{fpv2_sf} (equivalent to @samp{-mno-double-float -mno-fdivdu}),
+@samp{fpv2} (@samp{-mdouble-float -mno-divdu}), and
+@samp{fpv2_divd} (@samp{-mdouble-float -mdivdu}).
+
+@item -melrw
+@itemx -mno-elrw
+@opindex melrw
+Enable the extended @code{lrw} instruction. This option defaults to on
+for CK801 and off otherwise.
+
+@item -mistack
+@itemx -mno-istack
+@opindex mistack
+Enable interrupt stack instructions; the default is off.
+
+The @option{-mistack} option is required to handle the
+@code{interrupt} and @code{isr} function attributes
+(@pxref{C-SKY Function Attributes}).
+
+@item -mmp
+@opindex mmp
+Enable multiprocessor instructions; the default is off.
+
+@item -mcp
+@opindex mcp
+Enable coprocessor instructions; the default is off.
+
+@item -mcache
+@opindex mcache
+Enable coprocessor instructions; the default is off.
+
+@item -msecurity
+@opindex msecurity
+Enable C-SKY security instructions; the default is off.
+
+@item -mtrust
+@opindex mtrust
+Enable C-SKY trust instructions; the default is off.
+
+@item -mdsp
+@opindex mdsp
+@itemx -medsp
+@opindex medsp
+@itemx -mvdsp
+@opindex mvdsp
+Enable C-SKY DSP, Enhanced DSP, or Vector DSP instructions, respectively.
+All of these options default to off.
+
+@item -mdiv
+@itemx -mno-div
+@opindex mdiv
+Generate divide instructions. Default is off.
+
+@item -msmart
+@itemx -mno-smart
+@opindex msmart
+Generate code for Smart Mode, using only registers numbered 0-7 to allow
+use of 16-bit instructions. This option is ignored for CK801 where this
+is the required behavior, and it defaults to on for CK802.
+For other targets, the default is off.
+
+@item -mhigh-registers
+@itemx -mno-high-registers
+@opindex mhigh-registers
+Generate code using the high registers numbered 16-31. This option
+is not supported on CK801, CK802, or CK803, and is enabled by default
+for other processors.
+
+@item -manchor
+@itemx -mno-anchor
+@opindex manchor
+Generate code using global anchor symbol addresses.
+
+@item -mpushpop
+@itemx -mno-pushpop
+@opindex mpushpop
+Generate code using @code{push} and @code{pop} instructions. This option
+defaults to on.
+
+@item -mmultiple-stld
+@itemx -mstm
+@itemx -mno-multiple-stld
+@itemx -mno-stm
+@opindex mmultiple-stld
+Generate code using @code{stm} and @code{ldm} instructions. This option
+isn't supported on CK801 but is enabled by default on other processors.
+
+@item -mconstpool
+@itemx -mno-constpool
+@opindex mconstpool
+Create constant pools in the compiler instead of deferring it to the
+assembler. This option is the default and required for correct code
+generation on CK801 and CK802, and is optional on other processors.
+
+@item -mstack-size
+@item -mno-stack-size
+@opindex mstack-size
+Emit @code{.stack_size} directives for each function in the assembly
+output. This option defaults to off.
+
+@item -mccrt
+@itemx -mno-ccrt
+@opindex mccrt
+Generate code for the C-SKY compiler runtime instead of libgcc. This
+option defaults to off.
+
+@item -mbranch-cost=@var{n}
+@opindex mbranch-cost=
+Set the branch costs to roughly @code{n} instructions. The default is 1.
+
+@item -mcse-cc
+@itemx -mno-cse-cc
+@opindex mcse-cc
+Enable common subexpression elimination optimization on condition code
+expressions. This optimization pass is enabled by default at @option{-O1}
+and higher.
+
+@item -msched-prolog
+@itemx -mno-sched-prolog
+@opindex msched-prolog
+Permit scheduling of function prologue and epilogue sequences. Using
+this option can result in code that is not compliant with the C-SKY V2 ABI
+prologue requirements and that cannot be debugged or backtraced.
+It is disabled by default.
+
+@end table
+
@node Darwin Options
@subsection Darwin Options
@cindex Darwin options
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 6d15d99..afb2ba8 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -2121,6 +2121,42 @@ Check for 64 bits wide constants for add/sub instructions
Floating point constant that is legal for store immediate
@end table
+@item C-SKY---@file{config/csky/constraints.md}
+@table @code
+
+@item a
+The mini registers r0 - r7.
+
+@item b
+The low registers r0 - r15.
+
+@item c
+C register.
+
+@item y
+HI and LO registers.
+
+@item l
+LO register.
+
+@item h
+HI register.
+
+@item v
+Vector registers.
+
+@item z
+Stack pointer register (SP).
+@end table
+
+@ifset INTERNALS
+The C-SKY back end supports a large set of additional constraints
+that are only useful for instruction selection or splitting rather
+than inline asm, such as constraints representing constant integer
+ranges accepted by particular instruction encodings.
+Refer to the source code for details.
+@end ifset
+
@item Epiphany---@file{config/epiphany/constraints.md}
@table @code
@item U16
^ permalink raw reply [flat|nested] 6+ messages in thread
* [4/5] C-SKY port v2: Testsuite
2018-07-30 16:47 [0/5] C-SKY port v2 Sandra Loosemore
` (2 preceding siblings ...)
2018-07-30 16:52 ` [3/5] C-SKY port v2: Documentation Sandra Loosemore
@ 2018-07-30 16:53 ` Sandra Loosemore
2018-07-30 16:54 ` [5/5] C-SKY port v2: libgcc Sandra Loosemore
4 siblings, 0 replies; 6+ messages in thread
From: Sandra Loosemore @ 2018-07-30 16:53 UTC (permalink / raw)
To: gcc-patches; +Cc: Xianmiao Qu, Yunhai Shang, Jeff Law
[-- Attachment #1: Type: text/plain, Size: 1359 bytes --]
2018-07-30 Sandra Loosemore <sandra@codesourcery.com>
Chung-Lin Tang <cltang@codesourcery.com>
Xianmiao Qu <xianmiao_qu@c-sky.com>
C-SKY port: Testsuite
gcc/testsuite/
* g++.dg/Wno-frame-address.C: Adjust for C-SKY.
* g++.dg/torture/type-generic-1.C: Likewise.
* gcc.c-torture/compile/20000804-1.c: Likewise.
* gcc.c-torture/execute/20101011-1.c: Likewise.
* gcc.c-torture/execute/ieee/mul-subnormal-single-1.x: Likewise.
* gcc.dg/20020312-2.c: Likewise.
* gcc.dg/Wno-frame-address.c: Likewise.
* gcc.dg/c11-true_min-1.c: Likewise.
* gcc.dg/sibcall-10.c: Likewise.
* gcc.dg/sibcall-9.c: Likewise.
* gcc.dg/stack-usage-1.c: Likewise.
* gcc.dg/torture/float32-tg-3.c: Likewise.
* gcc.dg/torture/float32x-tg-3.c: Likewise.
* gcc.dg/torture/float64-tg-3.c: Likewise.
* gcc.dg/torture/float64x-tg-3.c: Likewise.
* gcc.dg/torture/type-generic-1.c: Likewise.
* gcc.target/csky/*: New.
* lib/target-supports.exp (check_profiling_available): Add
csky-*-elf.
(check_effective_target_hard_float): Handle C-SKY targets with
single-precision hard float only.
(check_effective_target_logical_op_short_circuit): Handle C-SKY.
[-- Attachment #2: csky-gcc-4.patch --]
[-- Type: text/x-patch, Size: 24478 bytes --]
diff --git a/gcc/testsuite/g++.dg/Wno-frame-address.C b/gcc/testsuite/g++.dg/Wno-frame-address.C
index a2df034..54a02fe 100644
--- a/gcc/testsuite/g++.dg/Wno-frame-address.C
+++ b/gcc/testsuite/g++.dg/Wno-frame-address.C
@@ -1,5 +1,5 @@
// { dg-do compile }
-// { dg-skip-if "Cannot access arbitrary stack frames." { arm*-*-* hppa*-*-* ia64-*-* } }
+// { dg-skip-if "Cannot access arbitrary stack frames." { arm*-*-* hppa*-*-* ia64-*-* csky*-*-* } }
// { dg-options "-Werror" }
// { dg-additional-options "-mbackchain" { target s390*-*-* } }
diff --git a/gcc/testsuite/g++.dg/torture/type-generic-1.C b/gcc/testsuite/g++.dg/torture/type-generic-1.C
index 4d82592..7708724 100644
--- a/gcc/testsuite/g++.dg/torture/type-generic-1.C
+++ b/gcc/testsuite/g++.dg/torture/type-generic-1.C
@@ -4,6 +4,7 @@
/* { dg-do run } */
/* { dg-add-options ieee } */
/* { dg-skip-if "No Inf/NaN support" { spu-*-* } } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
#include "../../gcc.dg/tg-tests.h"
diff --git a/gcc/testsuite/gcc.c-torture/compile/20000804-1.c b/gcc/testsuite/gcc.c-torture/compile/20000804-1.c
index 5c6b731..35464c2 100644
--- a/gcc/testsuite/gcc.c-torture/compile/20000804-1.c
+++ b/gcc/testsuite/gcc.c-torture/compile/20000804-1.c
@@ -4,6 +4,7 @@
/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } } */
/* { dg-skip-if "No 64-bit registers" { m32c-*-* } } */
/* { dg-skip-if "Not enough 64-bit registers" { pdp11-*-* } { "-O0" } { "" } } */
+/* { dg-xfail-if "Inconsistent constraint on asm" { csky-*-* } { "-O0" } { "" } } */
/* { dg-xfail-if "" { h8300-*-* } } */
/* Copyright (C) 2000, 2003 Free Software Foundation */
diff --git a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c
index dda49a5..f95d900 100644
--- a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c
+++ b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c
@@ -93,6 +93,10 @@ __aeabi_idiv0 (int return_value)
#elif defined (__nvptx__)
/* There isn't even a signal function. */
# define DO_TEST 0
+#elif defined (__csky__)
+ /* This presently doesn't raise SIGFPE even on csky-linux-gnu, much
+ less bare metal. See the implementation of __divsi3 in libgcc. */
+# define DO_TEST 0
#else
# define DO_TEST 1
#endif
diff --git a/gcc/testsuite/gcc.c-torture/execute/ieee/mul-subnormal-single-1.x b/gcc/testsuite/gcc.c-torture/execute/ieee/mul-subnormal-single-1.x
index 16df951..ee40863 100644
--- a/gcc/testsuite/gcc.c-torture/execute/ieee/mul-subnormal-single-1.x
+++ b/gcc/testsuite/gcc.c-torture/execute/ieee/mul-subnormal-single-1.x
@@ -1,3 +1,8 @@
+if {[istarget "csky-*-*"] && [check_effective_target_hard_float]} {
+ # The C-SKY hardware FPU only supports flush-to-zero mode.
+ set torture_execute_xfail "csky-*-*"
+ return 1
+}
if [istarget "epiphany-*-*"] {
# The Epiphany single-precision floating point format does not
# support subnormals.
diff --git a/gcc/testsuite/gcc.dg/20020312-2.c b/gcc/testsuite/gcc.dg/20020312-2.c
index f5929e0..f8be3ce 100644
--- a/gcc/testsuite/gcc.dg/20020312-2.c
+++ b/gcc/testsuite/gcc.dg/20020312-2.c
@@ -111,6 +111,11 @@ extern void abort (void);
/* No pic register. */
#elif defined (__nvptx__)
/* No pic register. */
+#elif defined (__csky__)
+/* Pic register is r28, but some cores only have r0-r15. */
+# if defined (__CK807__) || defined (__CK810__)
+# define PIC_REG "r28"
+# endif
#else
# error "Modify the test for your target."
#endif
diff --git a/gcc/testsuite/gcc.dg/Wno-frame-address.c b/gcc/testsuite/gcc.dg/Wno-frame-address.c
index e6dfe52..9fe4d07 100644
--- a/gcc/testsuite/gcc.dg/Wno-frame-address.c
+++ b/gcc/testsuite/gcc.dg/Wno-frame-address.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-skip-if "Cannot access arbitrary stack frames" { arm*-*-* avr-*-* hppa*-*-* ia64-*-* visium-*-* } } */
+/* { dg-skip-if "Cannot access arbitrary stack frames" { arm*-*-* avr-*-* hppa*-*-* ia64-*-* visium-*-* csky-*-* } } */
/* { dg-options "-Werror" } */
/* { dg-additional-options "-mbackchain" { target { s390*-*-* } } } */
diff --git a/gcc/testsuite/gcc.dg/c11-true_min-1.c b/gcc/testsuite/gcc.dg/c11-true_min-1.c
index f666c72..1fbf514 100644
--- a/gcc/testsuite/gcc.dg/c11-true_min-1.c
+++ b/gcc/testsuite/gcc.dg/c11-true_min-1.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-std=c11" } */
/* { dg-xfail-run-if "PR58757 -mieee is required to compare denormals" { alpha*-*-* } } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
/* Test that the smallest positive value is not 0. This needs to be true
even when denormals are not supported, so we do not pass any flag
diff --git a/gcc/testsuite/gcc.dg/sibcall-10.c b/gcc/testsuite/gcc.dg/sibcall-10.c
index d89909a..54cc604 100644
--- a/gcc/testsuite/gcc.dg/sibcall-10.c
+++ b/gcc/testsuite/gcc.dg/sibcall-10.c
@@ -5,7 +5,7 @@
Copyright (C) 2002 Free Software Foundation Inc.
Contributed by Hans-Peter Nilsson <hp@bitrange.com> */
-/* { dg-do run { xfail { { cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* msp430*-*-* nds32*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
+/* { dg-do run { xfail { { cris-*-* crisv32-*-* csky-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* msp430*-*-* nds32*-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
/* -mlongcall disables sibcall patterns. */
/* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
/* -msave-restore disables sibcall patterns. */
diff --git a/gcc/testsuite/gcc.dg/sibcall-9.c b/gcc/testsuite/gcc.dg/sibcall-9.c
index 8e30952..fc3bd9d 100644
--- a/gcc/testsuite/gcc.dg/sibcall-9.c
+++ b/gcc/testsuite/gcc.dg/sibcall-9.c
@@ -5,7 +5,7 @@
Copyright (C) 2002 Free Software Foundation Inc.
Contributed by Hans-Peter Nilsson <hp@bitrange.com> */
-/* { dg-do run { xfail { { cris-*-* crisv32-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* msp430*-*-* nds32*-*-* nvptx-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
+/* { dg-do run { xfail { { cris-*-* crisv32-*-* csky-*-* h8300-*-* hppa*64*-*-* m32r-*-* mcore-*-* mn10300-*-* msp430*-*-* nds32*-*-* nvptx-*-* xstormy16-*-* v850*-*-* vax-*-* xtensa*-*-* } || { arm*-*-* && { ! arm32 } } } } } */
/* -mlongcall disables sibcall patterns. */
/* { dg-skip-if "" { powerpc*-*-* } { "-mlongcall" } { "" } } */
/* -msave-restore disables sibcall patterns. */
diff --git a/gcc/testsuite/gcc.dg/stack-usage-1.c b/gcc/testsuite/gcc.dg/stack-usage-1.c
index 038bd4e..e644014 100644
--- a/gcc/testsuite/gcc.dg/stack-usage-1.c
+++ b/gcc/testsuite/gcc.dg/stack-usage-1.c
@@ -101,6 +101,8 @@
#define SIZE 252
#elif defined (__M32R__)
#define SIZE 252
+#elif defined (__csky__)
+# define SIZE 252
#else
# define SIZE 256
#endif
diff --git a/gcc/testsuite/gcc.dg/torture/float32-tg-3.c b/gcc/testsuite/gcc.dg/torture/float32-tg-3.c
index b07c07a..e478a23 100644
--- a/gcc/testsuite/gcc.dg/torture/float32-tg-3.c
+++ b/gcc/testsuite/gcc.dg/torture/float32-tg-3.c
@@ -4,6 +4,7 @@
/* { dg-add-options float32 } */
/* { dg-add-options ieee } */
/* { dg-require-effective-target float32_runtime } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
#define WIDTH 32
#define EXT 0
diff --git a/gcc/testsuite/gcc.dg/torture/float32x-tg-3.c b/gcc/testsuite/gcc.dg/torture/float32x-tg-3.c
index 9f9f982..6f55779 100644
--- a/gcc/testsuite/gcc.dg/torture/float32x-tg-3.c
+++ b/gcc/testsuite/gcc.dg/torture/float32x-tg-3.c
@@ -4,6 +4,7 @@
/* { dg-add-options float32x } */
/* { dg-add-options ieee } */
/* { dg-require-effective-target float32x_runtime } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
#define WIDTH 32
#define EXT 1
diff --git a/gcc/testsuite/gcc.dg/torture/float64-tg-3.c b/gcc/testsuite/gcc.dg/torture/float64-tg-3.c
index a83e781..a1fead7 100644
--- a/gcc/testsuite/gcc.dg/torture/float64-tg-3.c
+++ b/gcc/testsuite/gcc.dg/torture/float64-tg-3.c
@@ -4,6 +4,7 @@
/* { dg-add-options float64 } */
/* { dg-add-options ieee } */
/* { dg-require-effective-target float64_runtime } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
#define WIDTH 64
#define EXT 0
diff --git a/gcc/testsuite/gcc.dg/torture/float64x-tg-3.c b/gcc/testsuite/gcc.dg/torture/float64x-tg-3.c
index 195c4fd..3cdd933 100644
--- a/gcc/testsuite/gcc.dg/torture/float64x-tg-3.c
+++ b/gcc/testsuite/gcc.dg/torture/float64x-tg-3.c
@@ -4,6 +4,7 @@
/* { dg-add-options float64x } */
/* { dg-add-options ieee } */
/* { dg-require-effective-target float64x_runtime } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
#define WIDTH 64
#define EXT 1
diff --git a/gcc/testsuite/gcc.dg/torture/type-generic-1.c b/gcc/testsuite/gcc.dg/torture/type-generic-1.c
index ef32b78..a5fa8e8 100644
--- a/gcc/testsuite/gcc.dg/torture/type-generic-1.c
+++ b/gcc/testsuite/gcc.dg/torture/type-generic-1.c
@@ -3,6 +3,7 @@
/* { dg-do run } */
/* { dg-skip-if "No Inf/NaN support" { spu-*-* } } */
+/* { dg-skip-if "No subnormal support" { csky-*-* } { "-mhard-float" } } */
/* { dg-options "-DUNSAFE" { target tic6x*-*-* visium-*-* nvptx-*-* } } */
/* { dg-add-options ieee } */
diff --git a/gcc/testsuite/gcc.target/csky/and1.c b/gcc/testsuite/gcc.target/csky/and1.c
new file mode 100644
index 0000000..14ce11a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/and1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-O1" } */
+
+/* Test special code generation patterns for bit operators. */
+
+int and1 (int x)
+{
+ return x & 0xfff7ffff;
+}
+
+/* { dg-final { scan-assembler "bclri" } } */
+
diff --git a/gcc/testsuite/gcc.target/csky/and2.c b/gcc/testsuite/gcc.target/csky/and2.c
new file mode 100644
index 0000000..c661199
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/and2.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-O1" } */
+
+/* Test special code generation patterns for bit operators. */
+
+int and2 (int x)
+{
+ return x & 0xfff00000;
+}
+
+/* { dg-final { scan-assembler "lsri" } } */
+/* { dg-final { scan-assembler "lsli" } } */
diff --git a/gcc/testsuite/gcc.target/csky/and3a.c b/gcc/testsuite/gcc.target/csky/and3a.c
new file mode 100644
index 0000000..3d706f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/and3a.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck801 -O1" } */
+
+/* Test special code generation patterns for bit operators. */
+
+int and3 (int x)
+{
+ return x & 0x000fffff;
+}
+
+/* { dg-final { scan-assembler "lsli" } } */
+/* { dg-final { scan-assembler "lsri" } } */
diff --git a/gcc/testsuite/gcc.target/csky/and3b.c b/gcc/testsuite/gcc.target/csky/and3b.c
new file mode 100644
index 0000000..127207d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/and3b.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck810f -O1" } */
+
+/* Test special code generation patterns for bit operators. */
+
+int and3 (int x)
+{
+ return x & 0x000fffff;
+}
+
+/* { dg-final { scan-assembler "zext" } } */
diff --git a/gcc/testsuite/gcc.target/csky/ck801-branch.c b/gcc/testsuite/gcc.target/csky/ck801-branch.c
new file mode 100644
index 0000000..95e6962
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/ck801-branch.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck801 -O1 -fno-reorder-blocks" } */
+
+/* Test branch generation on CK801, which cannot rely on assembler
+ branch relaxation because long branches clobber lr. */
+
+#define nop8 asm ("nop\nnop\nnop\nnop\nnop\nnop\nnop\nnop")
+#define nop64 nop8; nop8; nop8; nop8; nop8; nop8; nop8; nop8
+#define nop512 nop64; nop64; nop64; nop64; nop64; nop64; nop64; nop64
+#define nop4k nop512; nop512; nop512; nop512; nop512; nop512; nop512; nop512
+#define nop32k nop4k; nop4k; nop4k; nop4k; nop4k; nop4k; nop4k; nop4k
+
+extern void g (int);
+int f (int x, int y, int z)
+{
+ if (x == 0) // cmpnei; jbt
+ {
+ nop64;
+ x = y;
+ }
+ if (y == 0) // cmpnei; jbf; jbr
+ {
+ nop512;
+ y = z;
+ }
+ if (z == 0) // cmpnei; jbf; bsr
+ {
+ nop32k;
+ z = x;
+ }
+ return x + y + z;
+}
+
+/* { dg-final { scan-assembler "push.*lr" } } */
+/* { dg-final { scan-assembler "pop.*lr" } } */
+/* { dg-final { scan-assembler-times "cmpnei" 3 } } */
+/* { dg-final { scan-assembler-times "jbt" 1 } } */
+/* { dg-final { scan-assembler-times "jbf" 2 } } */
+/* { dg-final { scan-assembler-times "jbr" 1 } } */
+/* { dg-final { scan-assembler-times "bsr" 1 } } */
diff --git a/gcc/testsuite/gcc.target/csky/constpool-1.c b/gcc/testsuite/gcc.target/csky/constpool-1.c
new file mode 100644
index 0000000..5c7cfdc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/constpool-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck801 -O1" } */
+
+/* Make sure that constant pools are emitted by the compiler for ck801.
+ If this is deferred to the assembler, the compiler will compute
+ incorrect branch offsets. */
+
+void f (unsigned int *u, long long int *l, float *f, double *d)
+{
+ *u = 0xdeadbeef;
+ *l = 0xcafef00dc0ffeeULL;
+ *f = 3.14159F;
+ *d = 2.718281828459;
+}
+
+/* { dg-final { scan-assembler-times "\\.long" 6 } } */
diff --git a/gcc/testsuite/gcc.target/csky/constpool-2.c b/gcc/testsuite/gcc.target/csky/constpool-2.c
new file mode 100644
index 0000000..d654420
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/constpool-2.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck810f -O1 -mconstpool" } */
+
+/* Make sure that constant pools are emitted by the compiler when
+ -mconstpool is provided. */
+
+void f (unsigned int *u, long long int *l, float *f, double *d)
+{
+ *u = 0xdeadbeef;
+ *l = 0xcafef00dc0ffeeULL;
+ *f = 3.14159F;
+ *d = 2.718281828459;
+}
+
+/* { dg-final { scan-assembler-times "\\.long" 6 } } */
diff --git a/gcc/testsuite/gcc.target/csky/constpool-3.c b/gcc/testsuite/gcc.target/csky/constpool-3.c
new file mode 100644
index 0000000..e3a6e09
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/constpool-3.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-mcpu=ck810f -O1 -mno-constpool" } */
+
+/* Make sure that constant pools are not emitted by the compiler when
+ -mno-constpool is provided. */
+
+void f (unsigned int *u, long long int *l, float *f, double *d)
+{
+ *u = 0xdeadbeef;
+ *l = 0xcafef00dc0ffeeULL;
+ *f = 3.14159F;
+ *d = 2.718281828459;
+}
+
+/* { dg-final { scan-assembler-not "\\.long" } } */
diff --git a/gcc/testsuite/gcc.target/csky/cse-cc.c b/gcc/testsuite/gcc.target/csky/cse-cc.c
new file mode 100644
index 0000000..acf63b8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/cse-cc.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-O2" } */
+
+/* Test that the two comparisons are combined. This is supposed to be
+ handled by the cse_cc pass when conditional execution instructions
+ are generated (non-CK801) or generic code otherwise (CK801). */
+
+int e1, e2;
+
+void func (int a, int b, int c, int d, int f, int g)
+{
+ e1 = a > b ? f : g;
+ e2 = a > b ? c : d;
+
+ return;
+}
+
+/* { dg-final { scan-assembler-times "cmp" 1 } } */
+
diff --git a/gcc/testsuite/gcc.target/csky/csky.exp b/gcc/testsuite/gcc.target/csky/csky.exp
new file mode 100644
index 0000000..9569490
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/csky.exp
@@ -0,0 +1,79 @@
+# GCC testsuite for C-SKY targets.
+# Copyright (C) 2012-2018 Free Software Foundation, Inc.
+# Contributed by C-SKY Microsystems and Mentor Graphics.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+# Exit immediately if this isn't a C-SKY target.
+if ![istarget csky*-*-*] then {
+ return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+
+# Like dg-options, but treats certain C-SKY-specific options specially:
+#
+# -mcpu=*
+# Select the target cpu. Skip the test if the multilib flags force
+# a different cpu.
+proc dg-csky-options {args} {
+ upvar dg-extra-tool-flags extra_tool_flags
+ upvar dg-do-what do_what
+
+ set multilib_cpu ""
+ set multilib_hf ""
+ set cpu ""
+
+ foreach flag [target_info multilib_flags] {
+ regexp "^-mcpu=(.*)" $flag dummy multilib_cpu
+ regexp "^-mhard-float" $flag multilib_hf
+ }
+
+ set flags [lindex $args 1]
+
+ foreach flag $flags {
+ regexp "^-mcpu=(.*)" $flag dummy cpu
+ }
+
+ if {$cpu == ""} then {
+ set extra_tool_flags $flags
+ } elseif {$multilib_cpu == "" || $multilib_cpu == $cpu} then {
+ if { ($cpu == "ck801" || $cpu == "ck802")
+ && $multilib_hf != "" } then {
+ set do_what [list [lindex $do_what 0] "N" "P"]
+ } else {
+ set extra_tool_flags $flags
+ }
+ } else {
+ set do_what [list [lindex $do_what 0] "N" "P"]
+ }
+}
+
+# If a testcase doesn't have special options, use these.
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+ set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \
+ "" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish
diff --git a/gcc/testsuite/gcc.target/csky/fnargs-1.c b/gcc/testsuite/gcc.target/csky/fnargs-1.c
new file mode 100644
index 0000000..5cc85b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/fnargs-1.c
@@ -0,0 +1,38 @@
+/* { dg-do run } */
+
+/* Check that a structure argument passed partially in registers and
+ partially on the stack works. */
+
+#include <stdlib.h>
+#include <string.h>
+
+struct s {
+ unsigned int i;
+ double d;
+ char s[16];
+};
+
+/* Note specifically that, since there are 4 argument registers, the
+ value of ss.d is split between the last argument register and the
+ stack. */
+void
+f (struct s *sp, int j, struct s ss, int k)
+{
+ if (sp->i != ss.i
+ || sp->d != ss.d
+ || strcmp (sp->s, ss.s))
+ abort ();
+ if (j != -k)
+ abort ();
+}
+
+int
+main (void)
+{
+ struct s ss;
+ ss.i = 0xdeadbeef;
+ ss.d = 2.71828;
+ strcpy (ss.s, "shazam!");
+ f (&ss, 42, ss, -42);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/csky/fnargs-2.c b/gcc/testsuite/gcc.target/csky/fnargs-2.c
new file mode 100644
index 0000000..d4e1b71
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/fnargs-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+
+/* Check that varargs passed partially in registers and
+ partially on the stack works. */
+
+#include <stdlib.h>
+#include <string.h>
+#include <stdarg.h>
+
+struct s {
+ unsigned int i;
+ double d;
+ char s[16];
+};
+
+/* Note specifically that, as there are 4 argument registers,
+ the value of ss.d is split between the last argument register
+ and the stack. */
+void
+f (struct s *sp, ...)
+{
+ int j, k;
+ unsigned int i;
+ double d;
+ char *s;
+ va_list ap;
+ va_start (ap, sp);
+ j = va_arg (ap, int);
+ i = va_arg (ap, unsigned int);
+ d = va_arg (ap, double);
+ s = va_arg (ap, char *);
+ k = va_arg (ap, int);
+ va_end (ap);
+
+ if (sp->i != i
+ || sp->d != d
+ || strcmp (sp->s, s))
+ abort ();
+ if (j != -k)
+ abort ();
+}
+
+int
+main (void)
+{
+ struct s ss;
+ ss.i = 0xdeadbeef;
+ ss.d = 2.71828;
+ strcpy (ss.s, "shazam!");
+ f (&ss, 42, ss.i, ss.d, ss.s, -42);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/csky/fnargs-3.c b/gcc/testsuite/gcc.target/csky/fnargs-3.c
new file mode 100644
index 0000000..8cf3e5c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/fnargs-3.c
@@ -0,0 +1,31 @@
+/* { dg-do run } */
+
+/* Check that sub-word sized elements of structures passed in in
+ registers are handled correctly with respect to the current endianness. */
+
+#include <stdlib.h>
+#include <string.h>
+
+struct s {
+ short h;
+ char s[8];
+};
+
+void
+f (struct s *sp, struct s ss)
+{
+ if (sp->h != ss.h
+ || strcmp (sp->s, ss.s))
+ abort ();
+}
+
+int
+main (void)
+{
+ struct s ss;
+ ss.h = 42;
+ strcpy (ss.s, "shazam!");
+ f (&ss, ss);
+ return 0;
+}
+
diff --git a/gcc/testsuite/gcc.target/csky/land1.c b/gcc/testsuite/gcc.target/csky/land1.c
new file mode 100644
index 0000000..e5ca51c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/land1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-O1" } */
+
+/* Test special code generation patterns for bit operators. */
+
+long long int land1 (long long int x)
+{
+ return x & 0xffffffff00000000LL;
+}
+
+/* { dg-final { scan-assembler "movi.*, 0" } } */
diff --git a/gcc/testsuite/gcc.target/csky/land2.c b/gcc/testsuite/gcc.target/csky/land2.c
new file mode 100644
index 0000000..b45e7b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/land2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-O1" } */
+
+/* Test special code generation patterns for bit operators. */
+
+long long int land2 (long long int x)
+{
+ return x & 0x00000000ffffffffLL;
+}
+
+/* { dg-final { scan-assembler "movi.*, 0" } } */
diff --git a/gcc/testsuite/gcc.target/csky/naked.c b/gcc/testsuite/gcc.target/csky/naked.c
new file mode 100644
index 0000000..f81984c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/naked.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-final { scan-assembler-not "push" } } */
+/* { dg-final { scan-assembler-not "pop" } } */
+
+/* Check that there is no prologue/epilogue code emitted for a function
+ with the naked attribute. Without the attribute, this function would
+ push/pop lr. */
+
+extern void g (int);
+
+int __attribute__((naked))
+f (int x)
+{
+ g (x);
+ return 42;
+}
diff --git a/gcc/testsuite/gcc.target/csky/or1.c b/gcc/testsuite/gcc.target/csky/or1.c
new file mode 100644
index 0000000..24918bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/csky/or1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-csky-options "-O1" } */
+
+/* Test special code generation patterns for bit operators. */
+
+int or1 (int x)
+{
+ return x | 0x00100000;
+}
+
+/* { dg-final { scan-assembler "bseti" } } */
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 99613fd..7e81936 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -669,6 +669,7 @@ proc check_profiling_available { test_what } {
|| [istarget bfin-*-*]
|| [istarget cris-*-*]
|| [istarget crisv32-*-*]
+ || [istarget csky-*-elf]
|| [istarget fido-*-elf]
|| [istarget h8300-*-*]
|| [istarget lm32-*-*]
@@ -1228,6 +1229,16 @@ proc check_effective_target_hard_float { } {
# }]
}
+ # The generic test doesn't work for C-SKY because some cores have
+ # hard float for single precision only.
+ if { [istarget csky*-*-*] } {
+ return [check_no_compiler_messages hard_float assembly {
+ #if defined __csky_soft_float__
+ #error __csky_soft_float__
+ #endif
+ }]
+ }
+
# The generic test equates hard_float with "no call for adding doubles".
return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
double a (double b, double c) { return b + c; }
@@ -8804,6 +8815,7 @@ proc check_effective_target_logical_op_short_circuit {} {
|| [istarget arc*-*-*]
|| [istarget avr*-*-*]
|| [istarget crisv32-*-*] || [istarget cris-*-*]
+ || [istarget csky*-*-*]
|| [istarget mmix-*-*]
|| [istarget s390*-*-*]
|| [istarget powerpc*-*-*]
@@ -8822,6 +8834,7 @@ proc check_effective_target_logical_op_short_circuit {} {
proc check_effective_target_branch_cost {} {
if { [ istarget arm*-*-*]
|| [istarget avr*-*-*]
+ || [istarget csky*-*-*]
|| [istarget epiphany*-*-*]
|| [istarget frv*-*-*]
|| [istarget i?86-*-*] || [istarget x86_64-*-*]
^ permalink raw reply [flat|nested] 6+ messages in thread
* [5/5] C-SKY port v2: libgcc
2018-07-30 16:47 [0/5] C-SKY port v2 Sandra Loosemore
` (3 preceding siblings ...)
2018-07-30 16:53 ` [4/5] C-SKY port v2: Testsuite Sandra Loosemore
@ 2018-07-30 16:54 ` Sandra Loosemore
4 siblings, 0 replies; 6+ messages in thread
From: Sandra Loosemore @ 2018-07-30 16:54 UTC (permalink / raw)
To: gcc-patches; +Cc: Xianmiao Qu, Yunhai Shang, Jeff Law
[-- Attachment #1: Type: text/plain, Size: 324 bytes --]
2018-07-30 Jojo <jijie_rong@c-sky.com>
Huibin Wang <huibin_wang@c-sky.com>
Sandra Loosemore <sandra@codesourcery.com>
Chung-Lin Tang <cltang@codesourcery.com>
C-SKY port: libgcc
libgcc/
* config.host: Add C-SKY support.
* config/csky/*: New.
[-- Attachment #2: csky-gcc-5.patch --]
[-- Type: text/x-patch, Size: 36066 bytes --]
diff --git a/libgcc/config.host b/libgcc/config.host
index 18cabaf..bd4ef1e 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -108,6 +108,9 @@ cr16-*-*)
crisv32-*-*)
cpu_type=cris
;;
+csky*-*-*)
+ cpu_type=csky
+ ;;
fido-*-*)
cpu_type=m68k
;;
@@ -507,6 +510,15 @@ cris-*-elf)
cris-*-linux* | crisv32-*-linux*)
tmake_file="$tmake_file cris/t-cris t-softfp-sfdf t-softfp cris/t-linux"
;;
+csky-*-elf*)
+ tmake_file="csky/t-csky t-fdpbit"
+ extra_parts="$extra_parts crti.o crtn.o"
+ ;;
+csky-*-linux*)
+ tmake_file="$tmake_file csky/t-csky t-slibgcc-libgcc t-fdpbit csky/t-linux-csky"
+ extra_parts="$extra_parts crti.o crtn.o"
+ md_unwind_header=csky/linux-unwind.h
+ ;;
epiphany-*-elf* | epiphany-*-rtems*)
tmake_file="$tmake_file epiphany/t-epiphany t-fdpbit epiphany/t-custom-eqsf"
extra_parts="$extra_parts crti.o crtint.o crtrunc.o crtm1reg-r43.o crtm1reg-r63.o crtn.o"
diff --git a/libgcc/config/csky/crti.S b/libgcc/config/csky/crti.S
new file mode 100644
index 0000000..3e4beb9
--- /dev/null
+++ b/libgcc/config/csky/crti.S
@@ -0,0 +1,140 @@
+# Define _init and _fini entry points for C-SKY.
+# Copyright (C) 2018 Free Software Foundation, Inc.
+# Contributed by C-SKY Microsystems and Mentor Graphics.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+# <http://www.gnu.org/licenses/>.
+
+
+# This file just makes a stack frame for the contents of the .fini and
+# .init sections. Users may put any desired instructions in those
+# sections.
+
+ .file "crti.S"
+
+/* We use more complicated versions of this code with GLIBC. */
+#if defined(__gnu_linux__)
+
+#ifndef PREINIT_FUNCTION
+# define PREINIT_FUNCTION __gmon_start__
+#endif
+
+#ifndef PREINIT_FUNCTION_WEAK
+# define PREINIT_FUNCTION_WEAK 1
+#endif
+
+#if PREINIT_FUNCTION_WEAK
+ .global PREINIT_FUNCTION
+ .weak PREINIT_FUNCTION
+ .align 4
+ .type call_weak_fn, %function
+call_weak_fn:
+ // push lr
+ subi sp, 4
+ stw lr, (sp)
+#ifdef __PIC__
+ lrw a2, PREINIT_FUNCTION@GOT
+ addu a2, gb
+ ldw a2, (a2)
+#else
+ lrw a2, PREINIT_FUNCTION
+#endif
+ cmpnei a2, 0
+ bf 1f
+ jsr a2
+1:
+ // pop lr
+ ldw lr, (sp)
+ addi sp, 4
+ rts
+
+ .align 4
+#else
+ .hidden PREINIT_FUNCTION
+#endif /* PREINIT_FUNCTION_WEAK */
+
+ .section .init,"ax",@progbits
+ .align 4
+ .globl _init
+ .type _init, @function
+_init:
+ subi sp, 8
+ stw lr, (sp, 0)
+#ifdef __PIC__
+ // stw gb, (sp, 4)
+ bsr .Lgetpc
+.Lgetpc:
+ lrw gb, .Lgetpc@GOTPC
+ add gb, lr
+#endif
+#if PREINIT_FUNCTION_WEAK
+#ifdef __PIC__
+ lrw a2, call_weak_fn@GOTOFF
+ add a2, gb
+ jsr a2
+#else
+ jsri call_weak_fn
+#endif
+#else /* !PREINIT_FUNCTION_WEAK */
+#ifdef __PIC__
+ lrw a2, PREINIT_FUNCTION@PLT
+ addu a2, gb
+ ldw a2, (a2)
+ jsr a2
+#else
+ jsri PREINIT_FUNCTION
+#endif
+#endif /* PREINIT_FUNCTION_WEAK */
+
+ br 2f
+ .literals
+ .align 4
+2:
+ .section .fini,"ax",@progbits
+ .align 4
+ .globl _fini
+ .type _fini, @function
+_fini:
+ subi sp,8
+ stw lr, (sp, 0)
+ br 2f
+ .literals
+ .align 4
+2:
+
+/* These are the non-GLIBC versions. */
+#else /* !defined(__gnu_linux__) */
+ .section ".init"
+ .global _init
+ .type _init,@function
+ .align 2
+_init:
+ subi sp, 16
+ st.w lr, (sp, 12)
+ mov r0, r0
+
+ .section ".fini"
+ .global _fini
+ .type _fini,@function
+ .align 2
+_fini:
+ subi sp, 16
+ st.w lr, (sp, 12)
+ mov r0, r0
+#endif /* defined(__gnu_linux__) */
diff --git a/libgcc/config/csky/crtn.S b/libgcc/config/csky/crtn.S
new file mode 100644
index 0000000..8bef996
--- /dev/null
+++ b/libgcc/config/csky/crtn.S
@@ -0,0 +1,55 @@
+# Terminate C-SKY .init and .fini sections.
+# Copyright (C) 2018 Free Software Foundation, Inc.
+# Contributed by C-SKY Microsystems and Mentor Graphics.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+# <http://www.gnu.org/licenses/>.
+
+
+# This file just makes sure that the .fini and .init sections do in
+# fact return. Users may put any desired instructions in those sections.
+# This file is the last thing linked into any executable.
+
+ .file "crtn.S"
+
+# Is this the GLIBC version?
+#if defined(__gnu_linux__)
+ .section .init,"ax",@progbits
+ ldw lr, (sp, 0)
+ addi sp, 8
+ rts
+
+ .section .fini,"ax",@progbits
+ ldw lr, (sp, 0)
+ addi sp, 8
+ rts
+
+#else /* !defined(__gnu_linux__) */
+ .section ".init"
+ ldw lr, (sp, 12)
+ addi sp, 16
+ jmp lr
+
+ .section ".fini"
+ ldw lr, (sp, 12)
+ addi sp, 16
+ jmp lr
+
+# Th-th-th-that is all folks!
+#endif /* defined(__gnu_linux__) */
diff --git a/libgcc/config/csky/lib1funcs.S b/libgcc/config/csky/lib1funcs.S
new file mode 100644
index 0000000..a0a3c73
--- /dev/null
+++ b/libgcc/config/csky/lib1funcs.S
@@ -0,0 +1,675 @@
+/* libgcc routines for C-SKY.
+ Copyright (C) 2018 Free Software Foundation, Inc.
+ Contributed by C-SKY Microsystems and Mentor Graphics.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 3, or (at your option) any
+ later version.
+
+ This file is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+
+/* Use the right prefix for global labels. */
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+#define SYM(x) CONCAT1 (__, x)
+
+#ifndef __CSKYBE__
+#define xl r0
+#define xh r1
+#define yl r2
+#define yh r3
+#else
+#define xh r0
+#define xl r1
+#define yh r2
+#define yl r3
+#endif
+
+
+#ifdef __ELF__
+#define TYPE(x) .type SYM (x),@function
+#define SIZE(x) .size SYM (x), . - SYM (x)
+#else
+#define TYPE(x)
+#define SIZE(x)
+#endif
+
+.macro FUNC_START name
+ .text
+ .align 2
+ .globl SYM (\name)
+ TYPE (\name)
+SYM (\name):
+.endm
+
+.macro FUNC_END name
+ SIZE (\name)
+.endm
+
+
+/* Emulate FF1 ("fast find 1") instruction on ck801.
+ Result goes in rx, clobbering ry. */
+#if defined(__CK801__)
+.macro FF1_M rx, ry
+ movi \rx, 32
+10:
+ cmphsi \ry, 1
+ bf 11f
+ subi \rx, \rx, 1
+ lsri \ry, \ry, 1
+ br 10b
+11:
+.endm
+#else
+.macro FF1_M rx, ry
+ ff1 \rx, \ry
+.endm
+#endif
+
+/* Likewise emulate lslc instruction ("logical left shift to C") on CK801. */
+#if defined(__CK801__)
+.macro LSLC_M rx
+ cmpne \rx, \rx
+ addc \rx, \rx
+.endm
+#else
+.macro LSLC_M rx
+ lslc \rx
+.endm
+#endif
+
+/* Emulate the abs instruction. */
+#if defined(__CK802__)
+.macro ABS_M rx
+ btsti \rx, 31
+ bf 10f
+ not \rx
+ addi \rx, 1
+10:
+.endm
+#elif defined(__CK801__)
+.macro ABS_M rx
+ cmplti \rx, 1
+ bf 10f
+ not \rx
+ addi \rx, 1
+10:
+.endm
+#else
+.macro ABS_M rx
+ abs \rx
+.endm
+#endif
+
+/* Emulate the ld.hs ("load signed halfword and extend") instruction
+ on ck801 and ck802. */
+#if defined(__CK801__)
+.macro LDBS_M rx, ry
+ ld.b \rx, (\ry, 0x0)
+ sextb \rx, \rx
+.endm
+#else
+.macro LDBS_M rx, ry
+ ld.bs \rx, (\ry, 0x0)
+.endm
+#endif
+
+#if defined(__CK801__)
+.macro LDHS_M rx, ry
+ ld.h \rx, (\ry, 0x0)
+ sexth \rx, \rx
+.endm
+#else
+.macro LDHS_M rx, ry
+ ld.hs \rx, (\ry, 0x0)
+.endm
+#endif
+
+
+/* Signed and unsigned div/mod/rem functions. */
+
+#ifdef L_udivsi3
+FUNC_START udiv32
+FUNC_START udivsi3
+ cmpnei a1, 0 // look for 0 divisor
+ bt 9f
+ trap 3 // divide by 0
+9:
+ // control iterations, skip across high order 0 bits in dividend
+ cmpnei a0, 0
+ bt 8f
+ jmp lr // 0 dividend quick return
+8:
+ push l0
+ movi a2, 1 // a2 is quotient (1 for a sentinel)
+ mov a3, a0
+ FF1_M l0, a3 // figure distance to skip
+ lsl a2, l0 // move the sentinel along (with 0's behind)
+ lsl a0, l0 // and the low 32 bits of numerator
+
+ // FIXME: Is this correct?
+ mov a3, a1 // looking at divisor
+ FF1_M l0, a3 // I can move 32-l0 more bits to left.
+ addi l0, 1 // ok, one short of that...
+ mov a3, a0
+ lsr a3, l0 // bits that came from low order...
+ not l0 // l0 == "32-n" == LEFT distance
+ addi l0, 33 // this is (32-n)
+ lsl a2,l0 // fixes the high 32 (quotient)
+ lsl a0,l0
+ cmpnei a2,0
+ bf 4f // the sentinel went away...
+
+ // run the remaining bits
+1:
+ LSLC_M a0 // 1 bit left shift of a3-a0
+ addc a3, a3
+ cmphs a3, a1 // upper 32 of dividend >= divisor?
+ bf 2f
+ subu a3, a1 // if yes, subtract divisor
+2:
+ addc a2, a2 // shift by 1 and count subtracts
+ bf 1b // if sentinel falls out of quotient, stop
+
+4:
+ mov a0, a2 // return quotient
+ mov a1, a3 // and piggyback the remainder
+ pop l0
+FUNC_END udiv32
+FUNC_END udivsi3
+#endif
+
+#ifdef L_umodsi3
+FUNC_START urem32
+FUNC_START umodsi3
+ cmpnei a1, 0 // look for 0 divisor
+ bt 9f
+ trap 3 // divide by 0
+9:
+ // control iterations, skip across high order 0 bits in dividend
+ cmpnei a0, 0
+ bt 8f
+ jmp lr // 0 dividend quick return
+8:
+ mov a2, a0
+ FF1_M a3, a2 // figure distance to skip
+ movi a2, 1 // a2 is quotient (1 for a sentinel)
+ lsl a2, a3 // move the sentinel along (with 0's behind)
+ lsl a0, a3 // and the low 32 bits of numerator
+ movi a3, 0
+
+1:
+ LSLC_M a0 // 1 bit left shift of a3-a0
+ addc a3, a3
+ cmphs a3, a1 // upper 32 of dividend >= divisor?
+ bf 2f
+ subu a3, a1 // if yes, subtract divisor
+2:
+ addc a2, a2 // shift by 1 and count subtracts
+ bf 1b // if sentinel falls out of quotient, stop
+
+4:
+ mov a0, a3 // and piggyback the remainder
+ jmp lr
+FUNC_END urem32
+FUNC_END umodsi3
+#endif
+
+
+#ifdef L_divsi3
+FUNC_START div32
+FUNC_START divsi3
+ cmpnei a1, 0 // look for 0 divisor
+ bt 9f
+ trap 3 // divide by 0
+9:
+ // control iterations, skip across high order 0 bits in dividend
+ cmpnei a0, 0
+ bt 8f
+ jmp lr // 0 dividend quick return
+8:
+ push l0, l1
+ mov l1, a0
+ xor l1, a1 // calc sign of quotient
+ ABS_M a0
+ ABS_M a1
+ movi a2, 1 // a2 is quotient (1 for a sentinel)
+ mov a3, a0
+ FF1_M l0, a3 // figure distance to skip
+ lsl a2, l0 // move the sentinel along (with 0's behind)
+ lsl a0, l0 // and the low 32 bits of numerator
+
+ // FIXME: is this correct?
+ mov a3, a1 // looking at divisor
+ FF1_M l0, a3 // I can move 32-l0 more bits to left.
+ addi l0, 1 // ok, one short of that...
+ mov a3, a0
+ lsr a3, l0 // bits that came from low order...
+ not l0 // l0 == "32-n" == LEFT distance
+ addi l0, 33 // this is (32-n)
+ lsl a2,l0 // fixes the high 32 (quotient)
+ lsl a0,l0
+ cmpnei a2,0
+ bf 4f // the sentinel went away...
+
+ // run the remaining bits
+1:
+ LSLC_M a0 // 1 bit left shift of a3-a0
+ addc a3, a3
+ cmphs a3, a1 // upper 32 of dividend >= divisor?
+ bf 2f
+ subu a3, a1 // if yes, subtract divisor
+2:
+ addc a2, a2 // shift by 1 and count subtracts
+ bf 1b // if sentinel falls out of quotient, stop
+
+4:
+ mov a0, a2 // return quotient
+ mov a1, a3 // and piggyback the remainder
+ LSLC_M l1 // after adjusting for sign
+ bf 3f
+ not a0
+ addi a0, 1
+ not a1
+ addi a1, 1
+3:
+ pop l0, l1
+FUNC_END div32
+FUNC_END divsi3
+#endif
+
+#ifdef L_modsi3
+FUNC_START rem32
+FUNC_START modsi3
+ push l0
+ cmpnei a1, 0 // look for 0 divisor
+ bt 9f
+ trap 3 // divide by 0
+9:
+ // control iterations, skip across high order 0 bits in dividend
+ cmpnei a0, 0
+ bt 8f
+ pop l0 // 0 dividend quick return
+8:
+ mov l0, a0
+ ABS_M a0
+ ABS_M a1
+ mov a2, a0
+ FF1_M a3, a2 // figure distance to skip
+ movi a2, 1 // a2 is quotient (1 for a sentinel)
+ lsl a2, a3 // move the sentinel along (with 0's behind)
+ lsl a0, a3 // and the low 32 bits of numerator
+ movi a3, 0
+
+ // run the remaining bits
+1:
+ LSLC_M a0 // 1 bit left shift of a3-a0
+ addc a3, a3
+ cmphs a3, a1 // upper 32 of dividend >= divisor?
+ bf 2f
+ subu a3, a1 // if yes, subtract divisor
+2:
+ addc a2, a2 // shift by 1 and count subtracts
+ bf 1b // if sentinel falls out of quotient, stop
+
+4:
+ mov a0, a3 // and piggyback the remainder
+ LSLC_M l0 // after adjusting for sign
+ bf 3f
+ not a0
+ addi a0, 1
+3:
+ pop l0
+FUNC_END rem32
+FUNC_END modsi3
+#endif
+
+/* Unordered comparisons for single and double float. */
+
+#ifdef L_unordsf2
+FUNC_START unordsf2
+#if defined(__CK801__)
+ subi sp, 4
+ st.w r4, (sp, 0x0)
+ lsli r2, r0, 1
+ lsli r3, r1, 1
+ asri r4, r2, 24
+ not r4
+ cmpnei r4, 0
+ bt 1f
+ lsli r4, r0, 9
+ cmpnei r4, 0
+ bt 3f
+1:
+ asri r4, r3, 24
+ not r4
+ cmpnei r4, 0
+ bt 2f
+ lsli r4, r1, 9
+ cmpnei r4, 0
+ bt 3f
+2:
+ ld.w r4, (sp, 0x0)
+ addi sp, 4
+ movi r0, 0
+ rts
+3:
+ ld.w r4, (sp, 0x0)
+ addi sp, 4
+ movi r0, 1
+ rts
+#elif defined(__CK802__)
+ lsli r2, r0, 1
+ lsli r3, r1, 1
+ asri r2, r2, 24
+ not r13, r2
+ cmpnei r13, 0
+ bt 1f
+ lsli r13, r0, 9
+ cmpnei r13, 0
+ bt 3f
+1:
+ asri r3, r3, 24
+ not r13, r3
+ cmpnei r13, 0
+ bt 2f
+ lsli r13, r1, 9
+ cmpnei r13, 0
+ bt 3f
+2:
+ movi r0, 0
+ rts
+3:
+ movi r0, 1
+ rts
+#else
+ lsli r2, r0, 1
+ lsli r3, r1, 1
+ asri r2, r2, 24
+ not r13, r2
+ bnez r13, 1f
+ lsli r13, r0, 9
+ bnez r13, 3f
+1:
+ asri r3, r3, 24
+ not r13, r3
+ bnez r13, 2f
+ lsli r13, r1, 9
+ bnez r13, 3f
+2:
+ movi r0, 0
+ rts
+3:
+ movi r0, 1
+ rts
+#endif
+FUNC_END unordsf2
+#endif
+
+#ifdef L_unorddf2
+FUNC_START unorddf2
+#if defined(__CK801__)
+ subi sp, 8
+ st.w r4, (sp, 0x0)
+ st.w r5, (sp, 0x4)
+ lsli r4, xh, 1
+ asri r4, r4, 21
+ not r4
+ cmpnei r4, 0
+ bt 1f
+ mov r4, xl
+ lsli r5, xh, 12
+ or r4, r5
+ cmpnei r4, 0
+ bt 3f
+1:
+ lsli r4, yh, 1
+ asri r4, r4, 21
+ not r4
+ cmpnei r4, 0
+ bt 2f
+ mov r4,yl
+ lsli r5, yh, 12
+ or r4, r5
+ cmpnei r4, 0
+ bt 3f
+2:
+ ld.w r4, (sp, 0x0)
+ ld.w r5, (sp, 0x4)
+ addi sp, 8
+ movi r0, 0
+ rts
+3:
+ ld.w r4, (sp, 0x0)
+ ld.w r5, (sp, 0x4)
+ addi sp, 8
+ movi r0, 1
+ rts
+#elif defined(__CK802__)
+ lsli r13, xh, 1
+ asri r13, r13, 21
+ not r13
+ cmpnei r13, 0
+ bt 1f
+ lsli xh, xh, 12
+ or r13, xl, xh
+ cmpnei r13, 0
+ bt 3f
+1:
+ lsli r13, yh, 1
+ asri r13, r13, 21
+ not r13
+ cmpnei r13, 0
+ bt 2f
+ lsli yh, yh, 12
+ or r13, yl, yh
+ cmpnei r13, 0
+ bt 3f
+2:
+ movi r0, 0
+ rts
+3:
+ movi r0, 1
+ rts
+#else
+ lsli r13, xh, 1
+ asri r13, r13, 21
+ not r13
+ bnez r13, 1f
+ lsli xh, xh, 12
+ or r13, xl, xh
+ bnez r13, 3f
+1:
+ lsli r13, yh, 1
+ asri r13, r13, 21
+ not r13
+ bnez r13, 2f
+ lsli yh, yh, 12
+ or r13, yl, yh
+ bnez r13, 3f
+2:
+ movi r0, 0
+ rts
+3:
+ movi r0, 1
+ rts
+#endif
+FUNC_END unorddf2
+#endif
+
+/* When optimizing for size on ck801 and ck802, GCC emits calls to the
+ following helper functions when expanding casesi, instead of emitting
+ the table lookup and jump inline. Note that in these functions the
+ jump is handled by tweaking the value of lr before rts. */
+#ifdef L_csky_case_sqi
+FUNC_START _gnu_csky_case_sqi
+ subi sp, 4
+ st.w a1, (sp, 0x0)
+ mov a1, lr
+ add a1, a1, a0
+ LDBS_M a1, a1
+ lsli a1, a1, 1
+ add lr, lr, a1
+ ld.w a1, (sp, 0x0)
+ addi sp, 4
+ rts
+FUNC_END _gnu_csky_case_sqi
+#endif
+
+#ifdef L_csky_case_uqi
+FUNC_START _gnu_csky_case_uqi
+ subi sp, 4
+ st.w a1, (sp, 0x0)
+ mov a1, lr
+ add a1, a1, a0
+ ld.b a1, (a1, 0x0)
+ lsli a1, a1, 1
+ add lr, lr, a1
+ ld.w a1, (sp, 0x0)
+ addi sp, 4
+ rts
+FUNC_END _gnu_csky_case_uqi
+#endif
+
+#ifdef L_csky_case_shi
+FUNC_START _gnu_csky_case_shi
+ subi sp, 8
+ st.w a0, (sp, 0x4)
+ st.w a1, (sp, 0x0)
+ mov a1, lr
+ lsli a0, a0, 1
+ add a1, a1, a0
+ LDHS_M a1, a1
+ lsli a1, a1, 1
+ add lr, lr, a1
+ ld.w a0, (sp, 0x4)
+ ld.w a1, (sp, 0x0)
+ addi sp, 8
+ rts
+FUNC_END _gnu_csky_case_shi
+#endif
+
+#ifdef L_csky_case_uhi
+FUNC_START _gnu_csky_case_uhi
+ subi sp, 8
+ st.w a0, (sp, 0x4)
+ st.w a1, (sp, 0x0)
+ mov a1, lr
+ lsli a0, a0, 1
+ add a1, a1, a0
+ ld.h a1, (a1, 0x0)
+ lsli a1, a1, 1
+ add lr, lr, a1
+ ld.w a0, (sp, 0x4)
+ ld.w a1, (sp, 0x0)
+ addi sp, 8
+ rts
+FUNC_END _gnu_csky_case_uhi
+#endif
+
+#ifdef L_csky_case_si
+FUNC_START _gnu_csky_case_si
+ subi sp, 8
+ st.w a0, (sp, 0x4)
+ st.w a1, (sp, 0x0)
+ mov a1, lr
+ addi a1, a1, 2 // Align to word.
+ bclri a1, a1, 1
+ mov lr, a1
+ lsli a0, a0, 2
+ add a1, a1, a0
+ ld.w a0, (a1, 0x0)
+ add lr, lr, a0
+ ld.w a0, (sp, 0x4)
+ ld.w a1, (sp, 0x0)
+ addi sp, 8
+ rts
+FUNC_END _gnu_csky_case_si
+#endif
+
+/* GCC expects that {__eq,__ne,__gt,__ge,__le,__lt}{df2,sf2}
+ will behave as __cmpdf2. So, we stub the implementations to
+ jump on to __cmpdf2 and __cmpsf2.
+
+ All of these short-circuit the return path so that __cmp{sd}f2
+ will go directly back to the caller. */
+
+.macro COMPARE_DF_JUMP name
+ .import SYM (cmpdf2)
+FUNC_START \name
+ jmpi SYM (cmpdf2)
+FUNC_END \name
+.endm
+
+#ifdef L_eqdf2
+COMPARE_DF_JUMP eqdf2
+#endif /* L_eqdf2 */
+
+#ifdef L_nedf2
+COMPARE_DF_JUMP nedf2
+#endif /* L_nedf2 */
+
+#ifdef L_gtdf2
+COMPARE_DF_JUMP gtdf2
+#endif /* L_gtdf2 */
+
+#ifdef L_gedf2
+COMPARE_DF_JUMP gedf2
+#endif /* L_gedf2 */
+
+#ifdef L_ltdf2
+COMPARE_DF_JUMP ltdf2
+#endif /* L_ltdf2 */
+
+#ifdef L_ledf2
+COMPARE_DF_JUMP ledf2
+#endif /* L_ledf2 */
+
+/* Single-precision floating point stubs. */
+
+.macro COMPARE_SF_JUMP name
+ .import SYM (cmpsf2)
+FUNC_START \name
+ jmpi SYM (cmpsf2)
+FUNC_END \name
+.endm
+
+#ifdef L_eqsf2
+COMPARE_SF_JUMP eqsf2
+#endif /* L_eqsf2 */
+
+#ifdef L_nesf2
+COMPARE_SF_JUMP nesf2
+#endif /* L_nesf2 */
+
+#ifdef L_gtsf2
+COMPARE_SF_JUMP gtsf2
+#endif /* L_gtsf2 */
+
+#ifdef L_gesf2
+COMPARE_SF_JUMP __gesf2
+#endif /* L_gesf2 */
+
+#ifdef L_ltsf2
+COMPARE_SF_JUMP __ltsf2
+#endif /* L_ltsf2 */
+
+#ifdef L_lesf2
+COMPARE_SF_JUMP lesf2
+#endif /* L_lesf2 */
diff --git a/libgcc/config/csky/linux-atomic.c b/libgcc/config/csky/linux-atomic.c
new file mode 100644
index 0000000..03cf2c0
--- /dev/null
+++ b/libgcc/config/csky/linux-atomic.c
@@ -0,0 +1,299 @@
+/* Linux-specific atomic operations for C-SKY.
+ Copyright (C) 2018 Free Software Foundation, Inc.
+ Contributed by C-SKY Microsystems and Mentor Graphics.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3, or (at your option) any later
+ version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+/* Kernel helper for compare-and-exchange. */
+inline int
+__kernel_cmpxchg (int oldval, int newval, volatile int *ptr)
+{
+ register int _a0 asm ("a0") = oldval;
+ register int _a1 asm ("a1") = newval;
+ register volatile int *_a2 asm ("a2") = ptr;
+ __asm__ __volatile__ ("trap 2\n" \
+ :"+r" (_a0) :"r" (_a1) , "r" (_a2) \
+ : "a3", "memory"); \
+ return _a0;
+}
+
+
+/* Kernel helper for memory barrier. */
+inline void __kernel_dmb (void)
+{
+ asm ("sync":::"memory");
+}
+
+/* Note: we implement byte, short and int versions of atomic operations using
+ the above kernel helpers, but there is no support for "long long" (64-bit)
+ operations as yet. */
+
+#define HIDDEN __attribute__ ((visibility ("hidden")))
+
+#ifdef __CSKYLE__
+#define INVERT_MASK_1 0
+#define INVERT_MASK_2 0
+#else
+#define INVERT_MASK_1 24
+#define INVERT_MASK_2 16
+#endif
+
+#define MASK_1 0xffu
+#define MASK_2 0xffffu
+
+#define FETCH_AND_OP_WORD(OP, PFX_OP, INF_OP) \
+ int HIDDEN \
+ __sync_fetch_and_##OP##_4 (int *ptr, int val) \
+ { \
+ int failure, tmp; \
+ \
+ do \
+ { \
+ tmp = *ptr; \
+ failure = __kernel_cmpxchg (tmp, PFX_OP (tmp INF_OP val), ptr); \
+ } \
+ while (failure != 0); \
+ \
+ return tmp; \
+ }
+
+FETCH_AND_OP_WORD (add, , +)
+FETCH_AND_OP_WORD (sub, , -)
+FETCH_AND_OP_WORD (or, , |)
+FETCH_AND_OP_WORD (and, , &)
+FETCH_AND_OP_WORD (xor, , ^)
+FETCH_AND_OP_WORD (nand, ~, &)
+
+#define NAME_oldval(OP, WIDTH) __sync_fetch_and_##OP##_##WIDTH
+#define NAME_newval(OP, WIDTH) __sync_##OP##_and_fetch_##WIDTH
+
+/* Implement both __sync_<op>_and_fetch and __sync_fetch_and_<op> for
+ subword-sized quantities. */
+
+#define SUBWORD_SYNC_OP(OP, PFX_OP, INF_OP, TYPE, WIDTH, RETURN) \
+ TYPE HIDDEN \
+ NAME##_##RETURN (OP, WIDTH) (TYPE *ptr, TYPE val) \
+ { \
+ int *wordptr = (int *) ((unsigned int) ptr & ~3); \
+ unsigned int mask, shift, oldval, newval; \
+ int failure; \
+ \
+ shift = (((unsigned int) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH; \
+ mask = MASK_##WIDTH << shift; \
+ \
+ do \
+ { \
+ oldval = *wordptr; \
+ newval = ((PFX_OP (((oldval & mask) >> shift) \
+ INF_OP (unsigned int) val)) << shift) & mask; \
+ newval |= oldval & ~mask; \
+ failure = __kernel_cmpxchg (oldval, newval, wordptr); \
+ } \
+ while (failure != 0); \
+ \
+ return (RETURN & mask) >> shift; \
+ }
+
+SUBWORD_SYNC_OP (add, , +, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (sub, , -, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (or, , |, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (and, , &, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (xor, , ^, unsigned short, 2, oldval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, oldval)
+
+SUBWORD_SYNC_OP (add, , +, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (sub, , -, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (or, , |, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (and, , &, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (xor, , ^, unsigned char, 1, oldval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, oldval)
+
+#define OP_AND_FETCH_WORD(OP, PFX_OP, INF_OP) \
+ int HIDDEN \
+ __sync_##OP##_and_fetch_4 (int *ptr, int val) \
+ { \
+ int tmp, failure; \
+ \
+ do \
+ { \
+ tmp = *ptr; \
+ failure = __kernel_cmpxchg (tmp, PFX_OP tmp INF_OP val, ptr); \
+ } \
+ while (failure != 0); \
+ \
+ return PFX_OP tmp INF_OP val; \
+ }
+
+OP_AND_FETCH_WORD (add, , +)
+OP_AND_FETCH_WORD (sub, , -)
+OP_AND_FETCH_WORD (or, , |)
+OP_AND_FETCH_WORD (and, , &)
+OP_AND_FETCH_WORD (xor, , ^)
+OP_AND_FETCH_WORD (nand, ~, &)
+
+SUBWORD_SYNC_OP (add, , +, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (sub, , -, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (or, , |, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (and, , &, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (xor, , ^, unsigned short, 2, newval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, newval)
+
+SUBWORD_SYNC_OP (add, , +, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (sub, , -, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (or, , |, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (and, , &, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (xor, , ^, unsigned char, 1, newval)
+SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, newval)
+
+int HIDDEN
+__sync_val_compare_and_swap_4 (int *ptr, int oldval, int newval)
+{
+ int actual_oldval, fail;
+
+ while (1)
+ {
+ actual_oldval = *ptr;
+
+ if (oldval != actual_oldval)
+ return actual_oldval;
+
+ fail = __kernel_cmpxchg (actual_oldval, newval, ptr);
+
+ if (!fail)
+ return oldval;
+ }
+}
+
+#define SUBWORD_VAL_CAS(TYPE, WIDTH) \
+ TYPE HIDDEN \
+ __sync_val_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval, \
+ TYPE newval) \
+ { \
+ int *wordptr = (int *)((unsigned int) ptr & ~3), fail; \
+ unsigned int mask, shift, actual_oldval, actual_newval; \
+ \
+ shift = (((unsigned int) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH; \
+ mask = MASK_##WIDTH << shift; \
+ \
+ while (1) \
+ { \
+ actual_oldval = *wordptr; \
+ \
+ if (((actual_oldval & mask) >> shift) != (unsigned int) oldval) \
+ return (actual_oldval & mask) >> shift; \
+ \
+ actual_newval = (actual_oldval & ~mask) \
+ | (((unsigned int) newval << shift) & mask); \
+ \
+ fail = __kernel_cmpxchg (actual_oldval, actual_newval, \
+ wordptr); \
+ \
+ if (!fail) \
+ return oldval; \
+ } \
+ }
+
+SUBWORD_VAL_CAS (unsigned short, 2)
+SUBWORD_VAL_CAS (unsigned char, 1)
+
+typedef unsigned char bool;
+
+bool HIDDEN
+__sync_bool_compare_and_swap_4 (int *ptr, int oldval, int newval)
+{
+ int failure = __kernel_cmpxchg (oldval, newval, ptr);
+ return (failure == 0);
+}
+
+#define SUBWORD_BOOL_CAS(TYPE, WIDTH) \
+ bool HIDDEN \
+ __sync_bool_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval, \
+ TYPE newval) \
+ { \
+ TYPE actual_oldval \
+ = __sync_val_compare_and_swap_##WIDTH (ptr, oldval, newval); \
+ return (oldval == actual_oldval); \
+ }
+
+SUBWORD_BOOL_CAS (unsigned short, 2)
+SUBWORD_BOOL_CAS (unsigned char, 1)
+
+void HIDDEN
+__sync_synchronize (void)
+{
+ __kernel_dmb ();
+}
+
+int HIDDEN
+__sync_lock_test_and_set_4 (int *ptr, int val)
+{
+ int failure, oldval;
+
+ do
+ {
+ oldval = *ptr;
+ failure = __kernel_cmpxchg (oldval, val, ptr);
+ }
+ while (failure != 0);
+
+ return oldval;
+}
+
+#define SUBWORD_TEST_AND_SET(TYPE, WIDTH) \
+ TYPE HIDDEN \
+ __sync_lock_test_and_set_##WIDTH (TYPE *ptr, TYPE val) \
+ { \
+ int failure; \
+ unsigned int oldval, newval, shift, mask; \
+ int *wordptr = (int *) ((unsigned int) ptr & ~3); \
+ \
+ shift = (((unsigned int) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH; \
+ mask = MASK_##WIDTH << shift; \
+ \
+ do \
+ { \
+ oldval = *wordptr; \
+ newval = ((oldval & ~mask) \
+ | (((unsigned int) val << shift) & mask)); \
+ failure = __kernel_cmpxchg (oldval, newval, wordptr); \
+ } \
+ while (failure != 0); \
+ \
+ return (oldval & mask) >> shift; \
+ }
+
+SUBWORD_TEST_AND_SET (unsigned short, 2)
+SUBWORD_TEST_AND_SET (unsigned char, 1)
+
+#define SYNC_LOCK_RELEASE(TYPE, WIDTH) \
+ void HIDDEN \
+ __sync_lock_release_##WIDTH (TYPE *ptr) \
+ { \
+ /* All writes before this point must be seen before we release \
+ the lock itself. */ \
+ __kernel_dmb (); \
+ *ptr = 0; \
+ }
+
+SYNC_LOCK_RELEASE (int, 4)
+SYNC_LOCK_RELEASE (short, 2)
+SYNC_LOCK_RELEASE (char, 1)
diff --git a/libgcc/config/csky/linux-unwind.h b/libgcc/config/csky/linux-unwind.h
new file mode 100644
index 0000000..24638de
--- /dev/null
+++ b/libgcc/config/csky/linux-unwind.h
@@ -0,0 +1,131 @@
+/* DWARF2 EH unwinding support for C-SKY Linux.
+ Copyright (C) 2018 Free Software Foundation, Inc.
+ Contributed by C-SKY Microsystems and Mentor Graphics.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef inhibit_libc
+
+/* Do code reading to identify a signal frame, and set the frame
+ state data appropriately. See unwind-dw2.c for the structs. */
+
+#include <signal.h>
+#include <asm/unistd.h>
+
+/* The third parameter to the signal handler points to something with
+ this structure defined in asm/ucontext.h, but the name clashes with
+ struct ucontext from sys/ucontext.h so this private copy is used. */
+typedef struct _sig_ucontext {
+ unsigned long uc_flags;
+ struct _sig_ucontext *uc_link;
+ stack_t uc_stack;
+ struct sigcontext uc_mcontext;
+ sigset_t uc_sigmask;
+} _sig_ucontext_t;
+
+#define MD_FALLBACK_FRAME_STATE_FOR csky_fallback_frame_state
+
+static _Unwind_Reason_Code
+csky_fallback_frame_state (struct _Unwind_Context *context,
+ _Unwind_FrameState *fs)
+{
+ u_int16_t *pc = (u_int16_t *) context->ra;
+ struct sigcontext *sc;
+ _Unwind_Ptr new_cfa;
+ int i;
+
+ /* movi r7, __NR_rt_sigreturn; trap 0 */
+ if ((*(pc+0) == 0xea07) && (*(pc+1) == 119)
+ && (*(pc+2) == 0xc000) && (*(pc+3) == 0x2020))
+ {
+ struct sigframe
+ {
+ int sig;
+ int code;
+ struct sigcontext *psc;
+ unsigned long extramask[2]; /* _NSIG_WORDS */
+ struct sigcontext sc;
+ } *_rt = context->cfa;
+ sc = _rt->psc; // &(_rt->sc);
+ }
+ /* movi r7, __NR_rt_sigreturn; trap 0 */
+ else if ((*(pc+0) == 0xea07) && (*(pc+1) == 173)
+ && (*(pc+2) == 0xc000) && (*(pc+3) == 0x2020))
+ {
+ struct rt_sigframe
+ {
+ int sig;
+ struct siginfo *pinfo;
+ void* puc;
+ siginfo_t info;
+ struct ucontext uc;
+ } *_rt = context->cfa;
+ sc = &(_rt->uc.uc_mcontext);
+ }
+ else
+ return _URC_END_OF_STACK;
+
+ new_cfa = (_Unwind_Ptr) sc->sc_usp;
+ fs->regs.cfa_how = CFA_REG_OFFSET;
+ fs->regs.cfa_reg = STACK_POINTER_REGNUM;
+ fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa;
+
+ fs->regs.reg[0].how = REG_SAVED_OFFSET;
+ fs->regs.reg[0].loc.offset = (_Unwind_Ptr)&(sc->sc_a0) - new_cfa;
+
+ fs->regs.reg[1].how = REG_SAVED_OFFSET;
+ fs->regs.reg[1].loc.offset = (_Unwind_Ptr)&(sc->sc_a1) - new_cfa;
+
+ fs->regs.reg[2].how = REG_SAVED_OFFSET;
+ fs->regs.reg[2].loc.offset = (_Unwind_Ptr)&(sc->sc_a2) - new_cfa;
+
+ fs->regs.reg[3].how = REG_SAVED_OFFSET;
+ fs->regs.reg[3].loc.offset = (_Unwind_Ptr)&(sc->sc_a3) - new_cfa;
+
+ for (i = 4; i < 14; i++)
+ {
+ fs->regs.reg[i].how = REG_SAVED_OFFSET;
+ fs->regs.reg[i].loc.offset = ((_Unwind_Ptr)&(sc->sc_regs[i - 4])
+ - new_cfa);
+ }
+
+ for (i = 16; i < 32; i++)
+ {
+ fs->regs.reg[i].how = REG_SAVED_OFFSET;
+ fs->regs.reg[i].loc.offset = ((_Unwind_Ptr)&(sc->sc_exregs[i - 16])
+ - new_cfa);
+ }
+
+ /* FIXME : hi lo ? */
+ fs->regs.reg[15].how = REG_SAVED_OFFSET;
+ fs->regs.reg[15].loc.offset = (_Unwind_Ptr)&(sc->sc_r15) - new_cfa;
+
+ fs->regs.reg[56].how = REG_SAVED_OFFSET;
+ fs->regs.reg[56].loc.offset = (_Unwind_Ptr)&(sc->sc_pc) - new_cfa;
+ fs->retaddr_column = 56;
+ fs->signal_frame = 1;
+
+ return _URC_NO_REASON;
+}
+
+
+#endif
diff --git a/libgcc/config/csky/t-csky b/libgcc/config/csky/t-csky
new file mode 100644
index 0000000..06aa1c1
--- /dev/null
+++ b/libgcc/config/csky/t-csky
@@ -0,0 +1,28 @@
+# Makefile fragment for all C-SKY targets.
+# Copyright (C) 2018 Free Software Foundation, Inc.
+# Contributed by C-SKY Microsystems and Mentor Graphics.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+LIB1ASMSRC = csky/lib1funcs.S
+LIB1ASMFUNCS = _divsi3 _udivsi3 _modsi3 _umodsi3 _unorddf2 _unordsf2 \
+ _csky_case_sqi _csky_case_uqi _csky_case_shi _csky_case_uhi _csky_case_si
+
+LIB2FUNCS_EXCLUDE += _unord_df
+LIB2FUNCS_EXCLUDE += _unord_sf
+
+TARGET_LIBGCC2_CFLAGS=-O3 -DNO_FLOATLIB_FIXUNSDFSI
diff --git a/libgcc/config/csky/t-linux-csky b/libgcc/config/csky/t-linux-csky
new file mode 100644
index 0000000..1f5c4ce
--- /dev/null
+++ b/libgcc/config/csky/t-linux-csky
@@ -0,0 +1,21 @@
+# Makefile fragment for C-SKY targets running Linux.
+# Copyright (C) 2018 Free Software Foundation, Inc.
+# Contributed by C-SKY Microsystems and Mentor Graphics.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+LIB2ADD_ST += $(srcdir)/config/csky/linux-atomic.c
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-07-30 16:54 UTC | newest]
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2018-07-30 16:47 [0/5] C-SKY port v2 Sandra Loosemore
2018-07-30 16:50 ` [1/5] C-SKY port v2: Configury Sandra Loosemore
2018-07-30 16:51 ` [2/5] C-SKY port v2: Backend implementation Sandra Loosemore
2018-07-30 16:52 ` [3/5] C-SKY port v2: Documentation Sandra Loosemore
2018-07-30 16:53 ` [4/5] C-SKY port v2: Testsuite Sandra Loosemore
2018-07-30 16:54 ` [5/5] C-SKY port v2: libgcc Sandra Loosemore
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