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To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn References: <20240307011252.11808-1-chenglulu@loongson.cn> From: chenglulu Message-ID: Date: Sat, 9 Mar 2024 09:48:09 +0800 User-Agent: Mozilla/5.0 (X11; Linux loongarch64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <20240307011252.11808-1-chenglulu@loongson.cn> Content-Type: text/plain; charset=gbk; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-CM-TRANSID:AQAAf8Bx7c7Zv+tla3xSAA--.22406S3 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoWxZrWfKrykWw4xJFWkZrW7KFX_yoWrZry8pF ZrC3Z2kr4kJ397Jan7XrWkJrn5Cr4I9ayav3s7K3409w43Ar1UXF48K34ava1UCwn8tr1Y vF4Y9ryj9a1UK3gCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUv0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r106r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ Gr0_Gr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1Y6r17McIj6I8E87Iv67AK xVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IY64vIr41lc7I2V7IY0VAS07AlzV AYIcxG8wCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E 14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIx kGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAF wI0_Jr0_Gr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r 4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU8r9N3UU UUU== X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,MIME_CHARSET_FARAWAY,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Pushed to r14-9407. ÔÚ 2024/3/7 ÉÏÎç9:12, Lulu Cheng дµÀ: > If the hardware does not support LAMCAS, atomic_compare_and_swapsi needs to be > implemented through "ll.w+sc.w". In the implementation of the instruction sequence, > it is necessary to determine whether the two registers are equal. > Since LoongArch's comparison instructions do not distinguish between 32-bit > and 64-bit, the two operand registers that need to be compared are symbolically > extended, and one of the operand registers is obtained from memory through the > "ll.w" instruction, which can ensure that the symbolic expansion is carried out. > However, the value of the other operand register is not guaranteed to be the > value of the sign extension. > > gcc/ChangeLog: > > * config/loongarch/sync.md (atomic_cas_value_strong): > In loongarch64, a sign extension operation is added when > operands[2] is a register operand and the mode is SImode. > > gcc/testsuite/ChangeLog: > > * g++.target/loongarch/atomic-cas-int.C: New test. > --- > gcc/config/loongarch/sync.md | 46 ++++++++++++++----- > .../g++.target/loongarch/atomic-cas-int.C | 32 +++++++++++++ > 2 files changed, 67 insertions(+), 11 deletions(-) > create mode 100644 gcc/testsuite/g++.target/loongarch/atomic-cas-int.C > > diff --git a/gcc/config/loongarch/sync.md b/gcc/config/loongarch/sync.md > index 8f35a5b48d2..d41c2d26811 100644 > --- a/gcc/config/loongarch/sync.md > +++ b/gcc/config/loongarch/sync.md > @@ -245,18 +245,42 @@ (define_insn "atomic_cas_value_strong" > (clobber (match_scratch:GPR 5 "=&r"))] > "" > { > - return "1:\\n\\t" > - "ll.\\t%0,%1\\n\\t" > - "bne\\t%0,%z2,2f\\n\\t" > - "or%i3\\t%5,$zero,%3\\n\\t" > - "sc.\\t%5,%1\\n\\t" > - "beqz\\t%5,1b\\n\\t" > - "b\\t3f\\n\\t" > - "2:\\n\\t" > - "%G4\\n\\t" > - "3:\\n\\t"; > + output_asm_insn ("1:", operands); > + output_asm_insn ("ll.\t%0,%1", operands); > + > + /* Like the test case atomic-cas-int.C, in loongarch64, O1 and higher, the > + return value of the val_without_const_folding will not be truncated and > + will be passed directly to the function compare_exchange_strong. > + However, the instruction 'bne' does not distinguish between 32-bit and > + 64-bit operations. so if the upper 32 bits of the register are not > + extended by the 32nd bit symbol, then the comparison may not be valid > + here. This will affect the result of the operation. */ > + > + if (TARGET_64BIT && REG_P (operands[2]) > + && GET_MODE (operands[2]) == SImode) > + { > + output_asm_insn ("addi.w\t%5,%2,0", operands); > + output_asm_insn ("bne\t%0,%5,2f", operands); > + } > + else > + output_asm_insn ("bne\t%0,%z2,2f", operands); > + > + output_asm_insn ("or%i3\t%5,$zero,%3", operands); > + output_asm_insn ("sc.\t%5,%1", operands); > + output_asm_insn ("beqz\t%5,1b", operands); > + output_asm_insn ("b\t3f", operands); > + output_asm_insn ("2:", operands); > + output_asm_insn ("%G4", operands); > + output_asm_insn ("3:", operands); > + > + return ""; > } > - [(set (attr "length") (const_int 28))]) > + [(set (attr "length") > + (if_then_else > + (and (match_test "GET_MODE (operands[2]) == SImode") > + (match_test "REG_P (operands[2])")) > + (const_int 32) > + (const_int 28)))]) > > (define_insn "atomic_cas_value_strong_amcas" > [(set (match_operand:QHWD 0 "register_operand" "=&r") > diff --git a/gcc/testsuite/g++.target/loongarch/atomic-cas-int.C b/gcc/testsuite/g++.target/loongarch/atomic-cas-int.C > new file mode 100644 > index 00000000000..830ce48267a > --- /dev/null > +++ b/gcc/testsuite/g++.target/loongarch/atomic-cas-int.C > @@ -0,0 +1,32 @@ > +/* { dg-do run } */ > +/* { dg-options "-O2" } */ > + > +#include > +#include > + > +__attribute__ ((noinline)) long > +val_without_const_folding (long val) > +{ > + return val; > +} > + > +int > +main () > +{ > + int oldval = 0xaa; > + int newval = 0xbb; > + std::atomic amo; > + > + amo.store (oldval); > + > + long longval = val_without_const_folding (0xff80000000000000 + oldval); > + oldval = static_cast (longval); > + > + amo.compare_exchange_strong (oldval, newval); > + > + if (newval != amo.load (std::memory_order_relaxed)) > + __builtin_abort (); > + > + return 0; > +} > +