PING^2: [PATCH] mips: Fix up mips_atomic_assign_expand_fenv [PR94780]

[Xi Ruoyao <xry111@mengyan1223.wang>]

Ping again.

On Mon, 2021-06-28 at 21:50 +0800, Xi Ruoyao wrote:
> Ping.  CC several maintainers who may help to review MIPS patches. 
> Sorry if it sounds buzzing.
> 
> On Wed, 2021-06-23 at 11:11 +0800, Xi Ruoyao wrote:
> > Commit message shamelessly copied from 1777beb6b129 by jakub:
> > 
> > This function, because it is sometimes called even outside of
> > function
> > bodies, uses create_tmp_var_raw rather than create_tmp_var.  But in
> > order
> > for that to work, when first referenced, the VAR_DECLs need to
> > appear
> > in a
> > TARGET_EXPR so that during gimplification the var gets the right
> > DECL_CONTEXT and is added to local decls.
> > 
> > Bootstrapped & regtested on mips64el-linux-gnu.  Ok for trunk and
> > backport
> > to 11, 10, and 9?
> > 
> > gcc/
> > 
> >         * config/mips/mips.c (mips_atomic_assign_expand_fenv): Use
> >           TARGET_EXPR instead of MODIFY_EXPR.
> > ---
> >  gcc/config/mips/mips.c | 12 ++++++------
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> > 
> > diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
> > index 8f043399a8e..89d1be6cea6 100644
> > --- a/gcc/config/mips/mips.c
> > +++ b/gcc/config/mips/mips.c
> > @@ -22439,12 +22439,12 @@ mips_atomic_assign_expand_fenv (tree
> > *hold,
> > tree *clear, tree *update)
> >    tree get_fcsr = mips_builtin_decls[MIPS_GET_FCSR];
> >    tree set_fcsr = mips_builtin_decls[MIPS_SET_FCSR];
> >    tree get_fcsr_hold_call = build_call_expr (get_fcsr, 0);
> > -  tree hold_assign_orig = build2 (MODIFY_EXPR, MIPS_ATYPE_USI,
> > -                                 fcsr_orig_var,
> > get_fcsr_hold_call);
> > +  tree hold_assign_orig = build4 (TARGET_EXPR, MIPS_ATYPE_USI,
> > +                                 fcsr_orig_var, get_fcsr_hold_call,
> > NULL, NULL);
> >    tree hold_mod_val = build2 (BIT_AND_EXPR, MIPS_ATYPE_USI,
> > fcsr_orig_var,
> >                               build_int_cst (MIPS_ATYPE_USI,
> > 0xfffff003));
> > -  tree hold_assign_mod = build2 (MODIFY_EXPR, MIPS_ATYPE_USI,
> > -                                fcsr_mod_var, hold_mod_val);
> > +  tree hold_assign_mod = build4 (TARGET_EXPR, MIPS_ATYPE_USI,
> > +                                fcsr_mod_var, hold_mod_val, NULL,
> > NULL);
> >    tree set_fcsr_hold_call = build_call_expr (set_fcsr, 1,
> > fcsr_mod_var);
> >    tree hold_all = build2 (COMPOUND_EXPR, MIPS_ATYPE_USI,
> >                           hold_assign_orig, hold_assign_mod);
> > @@ -22454,8 +22454,8 @@ mips_atomic_assign_expand_fenv (tree *hold,
> > tree *clear, tree *update)
> >    *clear = build_call_expr (set_fcsr, 1, fcsr_mod_var);
> >  
> >    tree get_fcsr_update_call = build_call_expr (get_fcsr, 0);
> > -  *update = build2 (MODIFY_EXPR, MIPS_ATYPE_USI,
> > -                   exceptions_var, get_fcsr_update_call);
> > +  *update = build4 (TARGET_EXPR, MIPS_ATYPE_USI,
> > +                   exceptions_var, get_fcsr_update_call, NULL,
> > NULL);
> >    tree set_fcsr_update_call = build_call_expr (set_fcsr, 1,
> > fcsr_orig_var);
> >    *update = build2 (COMPOUND_EXPR, void_type_node, *update,
> >                     set_fcsr_update_call);
> 

-- 
Xi Ruoyao <xry111@mengyan1223.wang>
School of Aerospace Science and Technology, Xidian University