From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id DE7F03858D20 for ; Thu, 16 Nov 2023 09:14:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org DE7F03858D20 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=foss.arm.com Authentication-Results: sourceware.org; spf=none smtp.mailfrom=foss.arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org DE7F03858D20 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700126101; cv=none; b=cU5hs0vjOxGXFeP/kdxX8aiOBKc8ti9Qs4C0fNG3vpPE7LJnAiN90ZN3Cr5d1ZFQ1uVaDmWZCrXfr/S2kF4gQ3FzxH1O7i5sGZG2I4WlSY4S02tjaXjshmiZB2hASAMME+zTV6lb2oJkMKEYi4LGRtbOu2d4i8+1atO+pkEpPPk= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1700126101; c=relaxed/simple; bh=SlUm/qf+PQXQDA7XoW+tBY7Qs624J1WarUfKhwA0Og4=; h=Message-ID:Date:MIME-Version:Subject:To:From; b=OOlLjyfNgAqE4AEtY3vDCmzmzc1+SsvWKwN2o/ca2e+wXB7Dbwm/I9sGbidVNFCLuiGRPZ45xzlbjnahEy4UR8KYZYuRDWB0xdz/wB0uaxrCkRBG26jzSrjU2F3TZQFEoxqlBRjwjgQLI3ggfnRDMSN8IZ6/QiwC31POZpbgJjY= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 35DCA1595; Thu, 16 Nov 2023 01:15:44 -0800 (PST) Received: from [10.57.41.187] (unknown [10.57.41.187]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0D72B3F6C4; Thu, 16 Nov 2023 01:14:56 -0800 (PST) Message-ID: Date: Thu, 16 Nov 2023 09:14:56 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/6]AArch64: Remove special handling of generic cpu. Content-Language: en-GB To: Tamar Christina , gcc-patches@gcc.gnu.org Cc: nd@arm.com, Richard.Earnshaw@arm.com, Marcus.Shawcroft@arm.com, Kyrylo.Tkachov@arm.com, richard.sandiford@arm.com References: From: Richard Earnshaw In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3495.2 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,KAM_LOTSOFHASH,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 15/11/2023 17:07, Tamar Christina wrote: > Hi All, > > In anticipation of adding new generic turning values this removes the hardcoding > of the "generic" CPU and instead just specifies it as a normal CPU. > > No change in behavior is expected. > > Bootstrapped Regtested on aarch64-none-linux-gnu and no issues. > > Ok for master? > > Thanks, > Tamar > > gcc/ChangeLog: > > PR target/111370 > * config/aarch64/aarch64-cores.def: Add generic. > * config/aarch64/aarch64-opts.h (enum aarch64_proc): Remove generic. > * config/aarch64/aarch64-tune.md: Regenerate > * config/aarch64/aarch64.cc (all_cores): Remove generic > * config/aarch64/aarch64.h (enum target_cpus): Remove > TARGET_CPU_generic. > OK. R. > --- inline copy of patch -- > diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def > index eae40b29df6f8ae353d168b6f73845846d1da94b..3e363bd0e8bbc10cb5b28d6183647736318e6d40 100644 > --- a/gcc/config/aarch64/aarch64-cores.def > +++ b/gcc/config/aarch64/aarch64-cores.def > @@ -189,4 +189,7 @@ AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, V9A, (I8MM, BF16, SVE2_BITPER > AARCH64_CORE("neoverse-v2", neoversev2, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1) > AARCH64_CORE("demeter", demeter, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1) > > +/* Generic Architecture Processors. */ > +AARCH64_CORE("generic", generic, cortexa53, V8A, (), generic, 0x0, 0x0, -1) > + > #undef AARCH64_CORE > diff --git a/gcc/config/aarch64/aarch64-opts.h b/gcc/config/aarch64/aarch64-opts.h > index 831e28ab52a4271ef5467965039a32d078755d42..01151e93d17979f499523cabb74a449170483a70 100644 > --- a/gcc/config/aarch64/aarch64-opts.h > +++ b/gcc/config/aarch64/aarch64-opts.h > @@ -32,8 +32,6 @@ enum aarch64_processor > #define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \ > INTERNAL_IDENT, > #include "aarch64-cores.def" > - /* Used to indicate that no processor has been specified. */ > - generic, > /* Used to mark the end of the processor table. */ > aarch64_none > }; > diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md > index c969277d617ad5fd070a915bfedb83323eb71e6c..cd5d79ea9c221874578a4d5804e4f618e671ebcd 100644 > --- a/gcc/config/aarch64/aarch64-tune.md > +++ b/gcc/config/aarch64/aarch64-tune.md > @@ -1,5 +1,5 @@ > ;; -*- buffer-read-only: t -*- > ;; Generated automatically by gentune.sh from aarch64-cores.def > (define_attr "tune" > - "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa520,cortexa710,cortexa715,cortexa720,cortexx2,cortexx3,cortexx4,neoversen2,neoversev2,demeter" > + "cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa520,cortexa710,cortexa715,cortexa720,cortexx2,cortexx3,cortexx4,neoversen2,neoversev2,demeter,generic" > (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) > diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h > index d74e9116fc56cfa85558cc0810f76479e7280f69..b178bb5b62dbdcb1f5edbad4155416d6093a11f3 100644 > --- a/gcc/config/aarch64/aarch64.h > +++ b/gcc/config/aarch64/aarch64.h > @@ -720,7 +720,6 @@ enum target_cpus > #define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \ > TARGET_CPU_##INTERNAL_IDENT, > #include "aarch64-cores.def" > - TARGET_CPU_generic > }; > > /* If there is no CPU defined at configure, use generic as default. */ > diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc > index 07b1cde39209f5c7740e336b499e9aed31e4c515..086448632700bc97b0d4c75d85cef63f820e9944 100644 > --- a/gcc/config/aarch64/aarch64.cc > +++ b/gcc/config/aarch64/aarch64.cc > @@ -427,8 +427,6 @@ static const struct processor all_cores[] = > {NAME, IDENT, SCHED, AARCH64_ARCH_##ARCH, \ > feature_deps::cpu_##IDENT, &COSTS##_tunings}, > #include "aarch64-cores.def" > - {"generic", generic, cortexa53, AARCH64_ARCH_V8A, > - feature_deps::V8A ().enable, &generic_tunings}, > {NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, NULL} > }; > > > > >