* [x86] Fix CLWB documentation.
@ 2018-02-16 10:13 Koval, Julia
2018-02-16 23:38 ` Jeff Law
0 siblings, 1 reply; 2+ messages in thread
From: Koval, Julia @ 2018-02-16 10:13 UTC (permalink / raw)
To: 'GCC Patches'; +Cc: Uros Bizjak
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Hi,
This is small fix for documentation - it adds CLWB to skylake-avx512 and removes it from cannonlake.
gcc/
* doc/invoke.texi (Skylake Server): Add CLWB.
(Cannonlake): Remove CLWB.
Thanks,
Julia
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commit f27860b0ed8bb54c7967a6711ea17fc04d1300a6
Author: julia <jkoval@gkticlel801.igk.intel.com>
Date: Fri Feb 16 13:01:48 2018 +0300
doc-patch-16.12.18
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index bcffc8c..0b912fa 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -26502,14 +26502,14 @@ AVX5124VNNIW, AVX5124FMAPS and AVX512VPOPCNTDQ instruction set support.
Intel Skylake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA,
BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, XSAVES, AVX512F,
-AVX512VL, AVX512BW, AVX512DQ and AVX512CD instruction set support.
+CLWB, AVX512VL, AVX512BW, AVX512DQ and AVX512CD instruction set support.
@item cannonlake
Intel Cannonlake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2,
SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE,
RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC,
XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI,
-AVX512IFMA, SHA, CLWB and UMIP instruction set support.
+AVX512IFMA, SHA and UMIP instruction set support.
@item Icelake
Intel Icelake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2,
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [x86] Fix CLWB documentation.
2018-02-16 10:13 [x86] Fix CLWB documentation Koval, Julia
@ 2018-02-16 23:38 ` Jeff Law
0 siblings, 0 replies; 2+ messages in thread
From: Jeff Law @ 2018-02-16 23:38 UTC (permalink / raw)
To: Koval, Julia, 'GCC Patches'; +Cc: Uros Bizjak
On 02/16/2018 03:13 AM, Koval, Julia wrote:
> Hi,
> This is small fix for documentation - it adds CLWB to skylake-avx512 and removes it from cannonlake.
>
> gcc/
> * doc/invoke.texi (Skylake Server): Add CLWB.
> (Cannonlake): Remove CLWB.
OK.
jeff
^ permalink raw reply [flat|nested] 2+ messages in thread
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