From: Jiong Wang <jiong.wang@foss.arm.com>
To: "Richard Earnshaw (lists)" <Richard.Earnshaw@arm.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [AArch64][3/3] Migrate aarch64_expand_prologue/epilogue to aarch64_add_constant
Date: Wed, 20 Jul 2016 15:02:00 -0000 [thread overview]
Message-ID: <af5f44c0-ca48-6722-0005-002fa0c5a201@foss.arm.com> (raw)
In-Reply-To: <d0cde3a2-eee1-4812-56ce-bad1bdaa340f@arm.com>
On 20/07/16 15:18, Richard Earnshaw (lists) wrote:
> On 20/07/16 14:03, Jiong Wang wrote:
>> Those stack adjustment sequences inside aarch64_expand_prologue/epilogue
>> are doing exactly what's aarch64_add_constant offered, except they also
>> need to be aware of dwarf generation.
>>
>> This patch teach existed aarch64_add_constant about dwarf generation and
>> currently SP register is supported. Whenever SP is updated, there
>> should be CFA update, we then mark these instructions as frame related,
>> and if the update is too complex for gcc to guess the adjustment, we
>> attach explicit annotation.
>>
>> Both dwarf frame info size and pro/epilogue scheduling are improved after
>> this patch as aarch64_add_constant has better utilization of scratch
>> register.
>>
>> OK for trunk?
>>
>> gcc/
>> 2016-07-20 Jiong Wang <jiong.wang@arm.com>
>>
>> * config/aarch64/aarch64.c (aarch64_add_constant): Mark
>> instruction as frame related when it is. Generate CFA
>> annotation when it's necessary.
>> (aarch64_expand_prologue): Use aarch64_add_constant.
>> (aarch64_expand_epilogue): Likewise.
>>
> Are you sure using aarch64_add_constant is unconditionally safe? Stack
> adjustments need to be done very carefully to ensure that we never
> transiently deallocate part of the stack.
Richard,
Thanks for the review, yes, I believe using aarch64_add_constant is
unconditionally
safe here. Because we have generated a stack tie to clobber the whole
memory thus
prevent any instruction which access stack be scheduled after that.
The access to deallocated stack issue was there and fixed by
https://gcc.gnu.org/ml/gcc-patches/2014-09/msg02292.html.
aarch64_add_constant itself is generating the same instruction
sequences as the
original code, except for a few cases, it will prefer
move scratch_reg, #imm
add sp, sp, scratch_reg
than:
add sp, sp, #imm_part1
add sp, sp, #imm_part2
next prev parent reply other threads:[~2016-07-20 15:02 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <626096f0-957f-98bd-5efa-faa0c14eb5ab@foss.arm.com>
[not found] ` <b653851c-9587-a498-a8da-8d235b4ddbcc@foss.arm.com>
2016-07-20 13:03 ` Jiong Wang
2016-07-20 14:19 ` Richard Earnshaw (lists)
2016-07-20 15:02 ` Jiong Wang [this message]
2016-07-20 15:09 ` Richard Earnshaw (lists)
2016-07-21 10:08 ` Richard Earnshaw (lists)
2016-07-25 9:34 ` Jiong Wang
2016-07-25 13:08 ` Richard Earnshaw (lists)
2016-07-20 13:03 ` [AArch64][2/3] Optimize aarch64_add_constant to generate better addition sequences Jiong Wang
2016-07-20 14:13 ` Richard Earnshaw (lists)
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