From: 程璐璐 <chenglulu@loongson.cn>
To: Xi Ruoyao <xry111@mengyan1223.wang>,
Chenghua Xu <xuchenghua@loongson.cn>,
gcc-patches@gcc.gnu.org
Cc: joseph@codesourcery.com
Subject: Re: [PATCH v5 02/12] LoongArch Port: gcc build
Date: Sun, 23 Jan 2022 16:39:58 +0800 [thread overview]
Message-ID: <afd6bd1b-6067-9a82-39af-5b5c34596820@loongson.cn> (raw)
In-Reply-To: <c56cd827f91ba33c00e34d45e42fca18478ae980.camel@mengyan1223.wang>
在 2022/1/22 下午4:42, Xi Ruoyao 写道:
> On Sat, 2022-01-22 at 15:55 +0800, Chenghua Xu wrote:
>> +mstrict-align
>> +Target Var(TARGET_STRICT_ALIGN) Init(0)
>> +Do not generate unaligned memory accesses.
> Section 2.1.8 of LoongArch spec says "load/store instruction *may* be
> implemented to allow unaligned memory access". As it's not a "must",
> should we really enable this by default?
Currently, our main architecture supports this feature. Later, in the
compiler the value of this macro will be set according to the architecture.
next prev parent reply other threads:[~2022-01-23 8:40 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-22 7:55 [PATCH v5 00/12] Add LoongArch support Chenghua Xu
2022-01-22 7:55 ` [PATCH v5 01/12] LoongArch Port: Regenerate configure Chenghua Xu
2022-01-22 7:55 ` [PATCH v5 02/12] LoongArch Port: gcc build Chenghua Xu
2022-01-22 8:33 ` Xi Ruoyao
2022-01-22 8:41 ` Jakub Jelinek
2022-01-22 8:46 ` Xi Ruoyao
2022-01-22 8:56 ` 程璐璐
2022-01-22 9:05 ` Xi Ruoyao
2022-01-22 9:16 ` 程璐璐
2022-01-22 9:24 ` Andreas Schwab
2022-01-22 9:31 ` Jakub Jelinek
2022-01-22 10:35 ` 程璐璐
2022-01-23 8:16 ` 程璐璐
2022-01-22 8:34 ` Xi Ruoyao
2022-01-22 8:42 ` Xi Ruoyao
2022-01-23 8:39 ` 程璐璐 [this message]
2022-01-23 9:00 ` Xi Ruoyao
2022-01-23 9:28 ` 程璐璐
2022-01-22 7:55 ` [PATCH v5 03/12] LoongArch Port: Regenerate gcc/configure Chenghua Xu
2022-01-22 7:55 ` [PATCH v5 04/12] LoongArch Port: Machine Decsription files Chenghua Xu
2022-01-22 7:56 ` [PATCH v5 05/12] LoongArch Port: Machine description C files and .h files Chenghua Xu
2022-01-22 7:56 ` [PATCH v5 06/12] LoongArch Port: Builtin functions Chenghua Xu
2022-01-22 7:56 ` [PATCH v5 07/12] LoongArch Port: Builtin macros Chenghua Xu
2022-01-22 7:56 ` [PATCH v5 08/12] LoongArch Port: libgcc Chenghua Xu
2022-01-22 7:56 ` [PATCH v5 09/12] LoongArch Port: Regenerate libgcc/configure Chenghua Xu
2022-01-22 7:56 ` [PATCH v5 10/12] LoongArch Port: libgomp Chenghua Xu
2022-01-22 7:56 ` [PATCH v5 11/12] LoongArch Port: gcc/testsuite Chenghua Xu
2022-01-22 7:56 ` [PATCH v5 12/12] LoongArch Port: Add doc Chenghua Xu
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