Extract and insert merging patch

Extract and insert merging patch

[Petr Murzin]

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Hi,
This patch allows merging of extract and insert. Please have a look.

2014-09-16  Petr Murzin  <petr.murzin@intel.com>

* simplify-rtx.c (simplify_ternary_operation): Allow extract and
insert merging.

[-- Attachment #2: extract_insert_patch --]
[-- Type: application/octet-stream, Size: 1124 bytes --]

commit 668c8c9707eab9942c172feadedf69c415aafddd
Author: Petr Murzin <petr.murzin@intel.com>
Date:   Mon Sep 15 22:33:40 2014 +0400

    Allow extract and insert merging

diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index 32df80d..13ae71f 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -5183,6 +5183,21 @@ simplify_ternary_operation (enum rtx_code code, enum machine_mode mode,
 						 op0, XEXP (op1, 0), op2);
 		}
 	    }
+
+          /* Replace (vec_merge (vec_duplicate (vec_select a parallel (0))) a 1)
+              with a.  */
+           if (GET_CODE (op0) == VEC_DUPLICATE
+               && GET_CODE (XEXP (op0, 0)) == VEC_SELECT
+               && GET_CODE (XEXP (XEXP (op0, 0), 1)) == PARALLEL)
+             {
+               tem = XVECEXP ((XEXP (XEXP (op0, 0), 1)), 0, 0);
+               if (CONST_INT_P (tem) && CONST_INT_P (op2))
+                 {
+                   if (XEXP (XEXP (op0, 0), 0) == op1 && UINTVAL (tem) == 0
+                       && UINTVAL (op2) == 1)
+                     return op1;
+                 }
+             }
 	}
 
       if (rtx_equal_p (op0, op1)

Re: Extract and insert merging patch

[Marc Glisse]

On Tue, 16 Sep 2014, Petr Murzin wrote:

> Hi,
> This patch allows merging of extract and insert. Please have a look.
>
> 2014-09-16  Petr Murzin  <petr.murzin@intel.com>
>
> * simplify-rtx.c (simplify_ternary_operation): Allow extract and
> insert merging.

Hello,

no testcase?

You could probably generalize 0 and 1 to i and 1<<i, but that might 
require an extra check on the size of XEXP (op0, 0).

-- 
Marc Glisse

Re: Extract and insert merging patch

[Andrew Pinski]

On Tue, Sep 16, 2014 at 4:40 AM, Petr Murzin <petrmurzin1@gmail.com> wrote:
> Hi,
> This patch allows merging of extract and insert. Please have a look.
>
> 2014-09-16  Petr Murzin  <petr.murzin@intel.com>
>
> * simplify-rtx.c (simplify_ternary_operation): Allow extract and
> insert merging.

Besides no testcase.  Can your changelog mention vectors because I
thought from the description you were working on bits.

Thanks,
Andrew

Re: Extract and insert merging patch

[Jeff Law]

On 09/16/14 13:40, Andrew Pinski wrote:
> On Tue, Sep 16, 2014 at 4:40 AM, Petr Murzin <petrmurzin1@gmail.com> wrote:
>> Hi,
>> This patch allows merging of extract and insert. Please have a look.
>>
>> 2014-09-16  Petr Murzin  <petr.murzin@intel.com>
>>
>> * simplify-rtx.c (simplify_ternary_operation): Allow extract and
>> insert merging.
>
> Besides no testcase.  Can your changelog mention vectors because I
> thought from the description you were working on bits.
Similarly :-)

So a few more nits.  ChangeLog format is

	* file (function): What changed.

So something like

	* simplify-rtx.c (simplify_ternary_operation): Simplify
	(vec_merge (vec_duplicate (vec_select ...)) in some cases.


+          /* Replace (vec_merge (vec_duplicate (vec_select a parallel 
(0))) a 1)
+              with a.  */
+           if (GET_CODE (op0) == VEC_DUPLICATE
+               && GET_CODE (XEXP (op0, 0)) == VEC_SELECT
+               && GET_CODE (XEXP (XEXP (op0, 0), 1)) == PARALLEL)
+             {
+               tem = XVECEXP ((XEXP (XEXP (op0, 0), 1)), 0, 0);
+               if (CONST_INT_P (tem) && CONST_INT_P (op2))
+                 {
+                   if (XEXP (XEXP (op0, 0), 0) == op1 && UINTVAL (tem) == 0
+                       && UINTVAL (op2) == 1)

Line break before the first && UINTVAL.  ie, format it like this:

if (XEXP (XEXP ...)
     && UINTVAL (tem) == 0
     && UINTVAL (op2) == 1


And definitely include a testcase and repost for further review.

Thanks,
Jeff

Re: Extract and insert merging patch

[Petr Murzin]

[-- Attachment #1: Type: text/plain, Size: 1951 bytes --]

Hi,
Please have a look at updated patch.

2014-10-22  Petr Murzin  <petr.murzin@intel.com>

gcc/
        * simplify-rtx.c (simplify_ternary_operation): Simplify
          vec_merge (vec_duplicate (vec_select)).

gcc/testsuite/
        * gcc.target/i386/extract-insert-combining.c: New.

On Fri, Sep 19, 2014 at 1:43 AM, Jeff Law <law@redhat.com> wrote:
> On 09/16/14 13:40, Andrew Pinski wrote:
>>
>> On Tue, Sep 16, 2014 at 4:40 AM, Petr Murzin <petrmurzin1@gmail.com>
>> wrote:
>>>
>>> Hi,
>>> This patch allows merging of extract and insert. Please have a look.
>>>
>>> 2014-09-16  Petr Murzin  <petr.murzin@intel.com>
>>>
>>> * simplify-rtx.c (simplify_ternary_operation): Allow extract and
>>> insert merging.
>>
>>
>> Besides no testcase.  Can your changelog mention vectors because I
>> thought from the description you were working on bits.
>
> Similarly :-)
>
> So a few more nits.  ChangeLog format is
>
>         * file (function): What changed.
>
> So something like
>
>         * simplify-rtx.c (simplify_ternary_operation): Simplify
>         (vec_merge (vec_duplicate (vec_select ...)) in some cases.
>
>
> +          /* Replace (vec_merge (vec_duplicate (vec_select a parallel (0)))
> a 1)
> +              with a.  */
> +           if (GET_CODE (op0) == VEC_DUPLICATE
> +               && GET_CODE (XEXP (op0, 0)) == VEC_SELECT
> +               && GET_CODE (XEXP (XEXP (op0, 0), 1)) == PARALLEL)
> +             {
> +               tem = XVECEXP ((XEXP (XEXP (op0, 0), 1)), 0, 0);
> +               if (CONST_INT_P (tem) && CONST_INT_P (op2))
> +                 {
> +                   if (XEXP (XEXP (op0, 0), 0) == op1 && UINTVAL (tem) == 0
> +                       && UINTVAL (op2) == 1)
>
> Line break before the first && UINTVAL.  ie, format it like this:
>
> if (XEXP (XEXP ...)
>     && UINTVAL (tem) == 0
>     && UINTVAL (op2) == 1
>
>
> And definitely include a testcase and repost for further review.
>
> Thanks,
> Jeff

[-- Attachment #2: extract_insert_patch --]
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commit 17b6f266f4820420dc0b194dec679de4a0a64dce
Author: Petr Murzin <petr.murzin@intel.com>
Date:   Wed Oct 22 17:59:44 2014 +0400

    Extract-insert-combining

diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index 6b10917..fd7b9ea 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -5194,6 +5194,22 @@ simplify_ternary_operation (enum rtx_code code, enum machine_mode mode,
 						 op0, XEXP (op1, 0), op2);
 		}
 	    }
+
+	  /* Replace (vec_merge (vec_duplicate (vec_select a parallel (i))) a 1 << i)
+	     with a.  */
+	  if (GET_CODE (op0) == VEC_DUPLICATE
+	      && GET_CODE (XEXP (op0, 0)) == VEC_SELECT
+	      && GET_CODE (XEXP (XEXP (op0, 0), 1)) == PARALLEL
+	      && mode_nunits[GET_MODE (XEXP (op0, 0))] == 1)
+	    {
+	      tem = XVECEXP ((XEXP (XEXP (op0, 0), 1)), 0, 0);
+	      if (CONST_INT_P (tem) && CONST_INT_P (op2))
+		{
+		  if (XEXP (XEXP (op0, 0), 0) == op1
+		      && UINTVAL (op2) == 1 << UINTVAL (tem))
+		    return op1;
+		}
+	    }
 	}
 
       if (rtx_equal_p (op0, op1)
diff --git a/gcc/testsuite/gcc.target/i386/extract-insert-combining.c b/gcc/testsuite/gcc.target/i386/extract-insert-combining.c
new file mode 100644
index 0000000..2540e60
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/extract-insert-combining.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target sse4 } */
+/* { dg-options "-msse4.2 -O3 " } */
+/* { dg-final { scan-assembler-times "(?:vmovd|movd)\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "(?:vpaddd|paddd)\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "(?:vpinsrd|vpinsrd)\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-not "vmovss" } } */
+
+#include <immintrin.h>
+
+int
+main (int a, int b)
+{
+  int res;
+
+  __m128i xa, xb, xres;
+
+  xa = _mm_insert_epi32 (xa, a, 0);
+  xb = _mm_insert_epi32 (xb, b, 0);
+
+  xres = _mm_add_epi32 (xa, xb);
+
+  res = _mm_extract_epi32 (xres, 0);
+
+  xres = _mm_insert_epi32 (xres, res, 0);
+  xb   = _mm_insert_epi32 (xb, b, 0);
+
+  xres = _mm_add_epi32 (xres, xb);
+
+  res = _mm_extract_epi32 (xres, 0);
+
+  return res;
+}
+

Re: Extract and insert merging patch

[Jeff Law]

On 10/22/14 09:01, Petr Murzin wrote:
> Hi,
> Please have a look at updated patch.
>
> 2014-10-22  Petr Murzin  <petr.murzin@intel.com>
>
> gcc/
>          * simplify-rtx.c (simplify_ternary_operation): Simplify
>            vec_merge (vec_duplicate (vec_select)).
>
> gcc/testsuite/
>          * gcc.target/i386/extract-insert-combining.c: New.
Thanks.  This looks pretty good.  The only missing thing I see is a 
bootstrap and regression test.  Can you please take care of those and 
confirm the compiler bootstraps with your change and does not show any 
regressions in the testsuite?

With that step done this should be OK for the trunk.

jeff

Re: Extract and insert merging patch

[Marc Glisse]

On Wed, 22 Oct 2014, Petr Murzin wrote:

> +		      && UINTVAL (op2) == 1 << UINTVAL (tem))

With modes like V64QI around, it is better to replace 1 with 
HOST_WIDE_INT_1U, though we are not consistent about it.

-- 
Marc Glisse

Re: Extract and insert merging patch

[Petr Murzin]

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Hi,
Bootstrapped. No regressions detected. Please have a look. Is it ok for trunk?

2014-11-05  Petr Murzin  <petr.murzin@intel.com>

gcc/
         * simplify-rtx.c (simplify_ternary_operation): Simplify
           vec_merge (vec_duplicate (vec_select)).

gcc/testsuite/
         * gcc.target/i386/extract-insert-combining.c: New.

Thanks,
Petr

On Wed, Oct 22, 2014 at 9:35 PM, Marc Glisse <marc.glisse@inria.fr> wrote:
> On Wed, 22 Oct 2014, Petr Murzin wrote:
>
>> +                     && UINTVAL (op2) == 1 << UINTVAL (tem))
>
>
> With modes like V64QI around, it is better to replace 1 with
> HOST_WIDE_INT_1U, though we are not consistent about it.
>
> --
> Marc Glisse

[-- Attachment #2: extract_insert_patch --]
[-- Type: application/octet-stream, Size: 2178 bytes --]

commit c0af2490f061ebdfb47dbe21080432822010fe3a
Author: Petr Murzin <petr.murzin@intel.com>
Date:   Wed Nov 5 17:16:57 2014 +0300

    Extract/insert combining

diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index 1e4ba23..041194d 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -5196,6 +5196,22 @@ simplify_ternary_operation (enum rtx_code code, machine_mode mode,
 						 op0, XEXP (op1, 0), op2);
 		}
 	    }
+
+	  /* Replace (vec_merge (vec_duplicate (vec_select a parallel (i))) a 1 << i)
+	     with a.  */
+	  if (GET_CODE (op0) == VEC_DUPLICATE
+	      && GET_CODE (XEXP (op0, 0)) == VEC_SELECT
+	      && GET_CODE (XEXP (XEXP (op0, 0), 1)) == PARALLEL
+	      && mode_nunits[GET_MODE (XEXP (op0, 0))] == 1)
+	    {
+	      tem = XVECEXP ((XEXP (XEXP (op0, 0), 1)), 0, 0);
+	      if (CONST_INT_P (tem) && CONST_INT_P (op2))
+		{
+		  if (XEXP (XEXP (op0, 0), 0) == op1
+		      && UINTVAL (op2) == HOST_WIDE_INT_1U << UINTVAL (tem))
+		    return op1;
+		}
+	    }
 	}
 
       if (rtx_equal_p (op0, op1)
diff --git a/gcc/testsuite/gcc.target/i386/extract-insert-combining.c b/gcc/testsuite/gcc.target/i386/extract-insert-combining.c
new file mode 100644
index 0000000..f27f92c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/extract-insert-combining.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target sse4 } */
+/* { dg-options "-msse4.2 -O3" } */
+/* { dg-final { scan-assembler-times "(?:vmovd|movd)\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]" 3 } } */
+/* { dg-final { scan-assembler-times "(?:vpaddd|paddd)\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]" 2 } } */
+/* { dg-final { scan-assembler-times "(?:vpinsrd|pinsrd)\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]" 1 } } */
+/* { dg-final { scan-assembler-not "vmovss" } } */
+
+#include <immintrin.h>
+
+int
+main (int a, int b)
+{
+  int res;
+
+  __m128i xa, xb, xres;
+
+  xa = _mm_insert_epi32 (xa, a, 0);
+  xb = _mm_insert_epi32 (xb, b, 0);
+
+  xres = _mm_add_epi32 (xa, xb);
+
+  res = _mm_extract_epi32 (xres, 0);
+
+  xres = _mm_insert_epi32 (xres, res, 0);
+  xb   = _mm_insert_epi32 (xb, b, 0);
+
+  xres = _mm_add_epi32 (xres, xb);
+
+  res = _mm_extract_epi32 (xres, 0);
+
+  return res;
+}
+

Re: Extract and insert merging patch

[Jeff Law]

On 11/05/14 13:46, Petr Murzin wrote:
> Hi,
> Bootstrapped. No regressions detected. Please have a look. Is it ok for trunk?
>
> 2014-11-05  Petr Murzin  <petr.murzin@intel.com>
>
> gcc/
>           * simplify-rtx.c (simplify_ternary_operation): Simplify
>             vec_merge (vec_duplicate (vec_select)).
>
> gcc/testsuite/
>           * gcc.target/i386/extract-insert-combining.c: New.
Yes, this is fine.  Please go ahead and install onto the trunk.

Thanks,

jeff