* [PATCH] MIPS: Use Reg0 instead of const0_rtx for TRAP
@ 2024-06-19 15:53 YunQiang Su
2024-06-19 17:23 ` Maciej W. Rozycki
0 siblings, 1 reply; 4+ messages in thread
From: YunQiang Su @ 2024-06-19 15:53 UTC (permalink / raw)
To: gcc-patches; +Cc: YunQiang Su
MIPSr6 removes condition trap instructions with imm, so the instruction
like `teq $2,imm` will be converted to
li $at, imm
teq $2, $at
The current version of Gas cannot detect if imm is zero, and output
teq $2, $0
Let's do it in GCC.
gcc
* config/mips/mips.cc(mips_expand_conditional_trap): Use Reg0
instead of const0_rtx.
---
gcc/config/mips/mips.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index 48924116937..ba1e6214656 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -6026,7 +6026,7 @@ mips_expand_conditional_trap (rtx comparison)
emit_insn (gen_rtx_TRAP_IF (VOIDmode,
gen_rtx_fmt_ee (code, mode, op0, op1),
- const0_rtx));
+ gen_rtx_REG (mode, GP_REG_FIRST)));
}
\f
/* Initialize *CUM for a call to a function of type FNTYPE. */
--
2.39.3 (Apple Git-146)
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] MIPS: Use Reg0 instead of const0_rtx for TRAP
2024-06-19 15:53 [PATCH] MIPS: Use Reg0 instead of const0_rtx for TRAP YunQiang Su
@ 2024-06-19 17:23 ` Maciej W. Rozycki
2024-06-20 3:20 ` YunQiang Su
0 siblings, 1 reply; 4+ messages in thread
From: Maciej W. Rozycki @ 2024-06-19 17:23 UTC (permalink / raw)
To: YunQiang Su; +Cc: gcc-patches
On Wed, 19 Jun 2024, YunQiang Su wrote:
> MIPSr6 removes condition trap instructions with imm, so the instruction
> like `teq $2,imm` will be converted to
> li $at, imm
> teq $2, $at
>
> The current version of Gas cannot detect if imm is zero, and output
> teq $2, $0
> Let's do it in GCC.
It seems like an output pattern issue with `*conditional_trap_reg<mode>'
insn to me.
> diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
> index 48924116937..ba1e6214656 100644
> --- a/gcc/config/mips/mips.cc
> +++ b/gcc/config/mips/mips.cc
> @@ -6026,7 +6026,7 @@ mips_expand_conditional_trap (rtx comparison)
>
> emit_insn (gen_rtx_TRAP_IF (VOIDmode,
> gen_rtx_fmt_ee (code, mode, op0, op1),
> - const0_rtx));
> + gen_rtx_REG (mode, GP_REG_FIRST)));
IOW this just papers over the actual issue.
FWIW,
Maciej
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] MIPS: Use Reg0 instead of const0_rtx for TRAP
2024-06-19 17:23 ` Maciej W. Rozycki
@ 2024-06-20 3:20 ` YunQiang Su
2024-06-20 5:11 ` YunQiang Su
0 siblings, 1 reply; 4+ messages in thread
From: YunQiang Su @ 2024-06-20 3:20 UTC (permalink / raw)
To: Maciej W. Rozycki; +Cc: gcc-patches
Maciej W. Rozycki <macro@orcam.me.uk> 于2024年6月20日周四 01:24写道:
>
> On Wed, 19 Jun 2024, YunQiang Su wrote:
>
> > MIPSr6 removes condition trap instructions with imm, so the instruction
> > like `teq $2,imm` will be converted to
> > li $at, imm
> > teq $2, $at
> >
> > The current version of Gas cannot detect if imm is zero, and output
> > teq $2, $0
> > Let's do it in GCC.
>
> It seems like an output pattern issue with `*conditional_trap_reg<mode>'
> insn to me.
>
Yes. You are right. We should update `*conditional_trap_reg<mode>'.
> > diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
> > index 48924116937..ba1e6214656 100644
> > --- a/gcc/config/mips/mips.cc
> > +++ b/gcc/config/mips/mips.cc
> > @@ -6026,7 +6026,7 @@ mips_expand_conditional_trap (rtx comparison)
> >
> > emit_insn (gen_rtx_TRAP_IF (VOIDmode,
> > gen_rtx_fmt_ee (code, mode, op0, op1),
> > - const0_rtx));
> > + gen_rtx_REG (mode, GP_REG_FIRST)));
>
> IOW this just papers over the actual issue.
>
I think that we still need it, as it will make the RTL more easy to understand.
I think that we should make the surprise in RTL as less as possible.
> FWIW,
>
> Maciej
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] MIPS: Use Reg0 instead of const0_rtx for TRAP
2024-06-20 3:20 ` YunQiang Su
@ 2024-06-20 5:11 ` YunQiang Su
0 siblings, 0 replies; 4+ messages in thread
From: YunQiang Su @ 2024-06-20 5:11 UTC (permalink / raw)
To: Maciej W. Rozycki; +Cc: gcc-patches
YunQiang Su <syq@gcc.gnu.org> 于2024年6月20日周四 11:20写道:
>
> Maciej W. Rozycki <macro@orcam.me.uk> 于2024年6月20日周四 01:24写道:
> >
> > On Wed, 19 Jun 2024, YunQiang Su wrote:
> >
> > > MIPSr6 removes condition trap instructions with imm, so the instruction
> > > like `teq $2,imm` will be converted to
> > > li $at, imm
> > > teq $2, $at
> > >
> > > The current version of Gas cannot detect if imm is zero, and output
> > > teq $2, $0
> > > Let's do it in GCC.
> >
> > It seems like an output pattern issue with `*conditional_trap_reg<mode>'
> > insn to me.
> >
>
> Yes. You are right. We should update `*conditional_trap_reg<mode>'.
>
> > > diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
> > > index 48924116937..ba1e6214656 100644
> > > --- a/gcc/config/mips/mips.cc
> > > +++ b/gcc/config/mips/mips.cc
> > > @@ -6026,7 +6026,7 @@ mips_expand_conditional_trap (rtx comparison)
> > >
> > > emit_insn (gen_rtx_TRAP_IF (VOIDmode,
> > > gen_rtx_fmt_ee (code, mode, op0, op1),
> > > - const0_rtx));
> > > + gen_rtx_REG (mode, GP_REG_FIRST)));
> >
> > IOW this just papers over the actual issue.
> >
>
> I think that we still need it, as it will make the RTL more easy to understand.
> I think that we should make the surprise in RTL as less as possible.
>
Ohh, you are right. It seems some RTL optimization passes prefers const0_rtx
much more. It is not easy to use REG0 here.
> > FWIW,
> >
> > Maciej
^ permalink raw reply [flat|nested] 4+ messages in thread
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2024-06-19 15:53 [PATCH] MIPS: Use Reg0 instead of const0_rtx for TRAP YunQiang Su
2024-06-19 17:23 ` Maciej W. Rozycki
2024-06-20 3:20 ` YunQiang Su
2024-06-20 5:11 ` YunQiang Su
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