[commited] [PR99378] LRA: Skip decomposing address for asm insn operand with unknown constraint

[commited] [PR99378] LRA: Skip decomposing address for asm insn operand with unknown constraint

[Vladimir Makarov]

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   The following patch fixes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99378

   The patch was successfully bootstrapped and tested on x86-64.



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commit e786c7547eda4edd90797f6cae0f5e6405d64773 (HEAD -> master)
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date:   Fri Mar 5 11:41:25 2021 -0500

    [PR99378] LRA: Skip decomposing address for asm insn operand with unknown constraint.
    
      Function get_constraint_type returns CT__UNKNOWN for empty constraint
    and CT_FIXED_FORM for "X".  So process_address_1 skipped
    decompose_mem_address only for "X" constraint.  To do the same for empty
    constraint, skip decompose_mem_address for CT__UNKNOWN.
    
    gcc/ChangeLog:
    
            PR target/99378
            * lra-constraints.c (process_address_1): Skip decomposing address
            for asm insn operand with unknown constraint.
    
    gcc/testsuite/ChangeLog:
    
            PR target/99378
            * gcc.target/i386/pr99123-2.c: New.

diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 51acf7f0701..9253690561a 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -3450,8 +3450,9 @@ process_address_1 (int nop, bool check_only_p,
      i.e. bcst_mem_operand in i386 backend.  */
   else if (MEM_P (mem)
 	   && !(INSN_CODE (curr_insn) < 0
-		&& get_constraint_type (cn) == CT_FIXED_FORM
-	        && constraint_satisfied_p (op, cn)))
+		&& (cn == CONSTRAINT__UNKNOWN
+		    || (get_constraint_type (cn) == CT_FIXED_FORM
+			&& constraint_satisfied_p (op, cn)))))
     decompose_mem_address (&ad, mem);
   else if (GET_CODE (op) == SUBREG
 	   && MEM_P (SUBREG_REG (op)))
diff --git a/gcc/testsuite/gcc.target/i386/pr99123-2.c b/gcc/testsuite/gcc.target/i386/pr99123-2.c
new file mode 100644
index 00000000000..def4eae3c9d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr99123-2.c
@@ -0,0 +1,51 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -funroll-loops" } */
+
+static inline void *
+baz (void *s, unsigned long c, unsigned int count)
+{
+  int d0, d1;
+  __asm__ __volatile__ (""
+                        : "=&c" (d0), "=&D" (d1)
+                        :"a" (c), "q" (count), "0" (count / 4), "" ((long) s)   /// "1"
+                        :"memory");
+  return s;
+}
+
+struct A
+{
+  unsigned long *a;
+};
+
+inline static void *
+bar (struct A *x, int y)
+{
+  char *ptr;
+
+  ptr = (void *) x->a[y >> 12];
+  ptr += y % (1UL << 12);
+  return (void *) ptr;
+}
+
+int
+foo (struct A *x, unsigned int *y, int z, int u)
+{
+  int a, b, c, d, e;
+
+  z += *y;
+  c = z + u;
+  a = (z >> 12) + 1;
+  do
+    {
+      b = (a << 12);
+      d = b - z;
+      e = c - z;
+      if (e < d)
+        d = e;
+      baz (bar (x, z), 0, d);
+      z = b;
+      a++;
+    }
+  while (z < c);
+  return 0;
+}

Re: [commited] [PR99378] LRA: Skip decomposing address for asm insn operand with unknown constraint

[Joseph Myers]

This introduced an ICE building glibc for i686.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99422
https://sourceware.org/pipermail/libc-testresults/2021q1/007615.html

-- 
Joseph S. Myers
joseph@codesourcery.com

Re: [commited] [PR99378] LRA: Skip decomposing address for asm insn operand with unknown constraint

[Gerald Pfeifer]

On Fri, 5 Mar 2021, Vladimir Makarov via Gcc-patches wrote:
>   The following patch fixes
> 
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99378
> 
>   The patch was successfully bootstrapped and tested on x86-64.

Is it possible this breaks bootstrap on i586?

See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99438

  .../libgcc/soft-fp/divtf3.c: In function '__divtf3':
  .../libgcc/soft-fp/divtf3.c:51:1: error: unrecognizable insn:
   51 | }
      | ^
(insn 1185 3357 3676 80 (parallel [
            (set (reg:SI 5 di [621])
                (asm_operands:SI ("sub{l} {%11,%3|%3,%11}
        sbb{l} {%9,%2|%2,%9}
        sbb{l} {%7,%1|%1,%7}
        sbb{l} {%5,%0|%0,%5}") ("=r") 0 [
                        (reg:SI 5 di [621])
                        (mem/c:SI (plus:SI (reg/f:SI 6 bp)
                                (const_int -80 [0xffffffffffffffb0])) [5 A_f[2]+0 S4 A64])
                        (reg:SI 1 dx [622])
                        (mem/c:SI (plus:SI (reg/f:SI 6 bp)
                                (const_int -84 [0xffffffffffffffac])) [5 A_f[1]+0 S4 A32])
                        (reg:SI 0 ax [623])
                        (mem/c:SI (plus:SI (reg/f:SI 6 bp)

Gerald