From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 119270 invoked by alias); 21 May 2015 19:43:01 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 119200 invoked by uid 89); 21 May 2015 19:43:00 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.4 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: smtp.ispras.ru Received: from smtp.ispras.ru (HELO smtp.ispras.ru) (83.149.199.79) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 21 May 2015 19:42:59 +0000 Received: from [10.10.3.121] (unknown [83.149.199.91]) by smtp.ispras.ru (Postfix) with ESMTP id A99D9214EA; Thu, 21 May 2015 22:42:55 +0300 (MSK) Date: Thu, 21 May 2015 20:32:00 -0000 From: Alexander Monakov To: "H.J. Lu" cc: Richard Henderson , GCC Patches , Uros Bizjak Subject: Re: [PATCH] PR target/66232: -fPIC -fno-plt -mx32 fails to generate indirect branch via GOT In-Reply-To: Message-ID: References: <20150521125904.GA26391@gmail.com> <555E26F3.3020202@redhat.com> <555E2CB8.3040603@redhat.com> User-Agent: Alpine 2.11 (LNX 23 2013-08-11) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-SW-Source: 2015-05/txt/msg02035.txt.bz2 On Thu, 21 May 2015, H.J. Lu wrote: > On Thu, May 21, 2015 at 12:32 PM, Alexander Monakov wrote: > > On Thu, 21 May 2015, H.J. Lu wrote: > >> On Thu, May 21, 2015 at 12:06 PM, Richard Henderson wrote: > >> > On 05/21/2015 12:01 PM, H.J. Lu wrote: > >> >> +++ b/gcc/testsuite/gcc.target/i386/pr66232-1.c > >> >> @@ -0,0 +1,13 @@ > >> >> +/* { dg-do compile { target *-*-linux* } } */ > >> >> +/* { dg-options "-O2 -fpic -fno-plt" } */ > >> >> + > >> >> +extern void bar (void); > >> >> + > >> >> +void > >> >> +foo (void) > >> >> +{ > >> >> + bar (); > >> >> +} > >> >> + > >> >> +/* { dg-final { scan-assembler "jmp\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ > >> >> +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ > >> > > >> > Do you really want to check for no tail call for ia32 here? > >> > That's really just a missed optimization, surely. > >> > > >> > > >> > >> I'd like to keep it. When it is fixed, we can update it. I tried: > >> > >> https://gcc.gnu.org/ml/gcc-patches/2015-05/msg00230.html > >> > >> and got > >> > >> call __x86.get_pc_thunk.ax > >> addl $_GLOBAL_OFFSET_TABLE_, %eax > >> subl $28, %esp > >> .cfi_def_cfa_offset 32 > >> movl bar@GOT(%eax), %eax > >> movl %eax, 12(%esp) > >> addl $28, %esp > >> .cfi_def_cfa_offset 4 > >> jmp *%eax > >> > >> This is very odd code, comparing against > > > > To avoid that, you need the CLOBBERED_REGS patch too: > > https://gcc.gnu.org/ml/gcc-patches/2015-05/msg00227.html > > > > Should both patches be needed for ia32 tail call? I don't really understand the question. The first patch (that you've linked) is required to produce a tail call, the second patch (that I've linked) helps to produce clean code. To match the scan-assembler test as written in your testcase, both patches are needed. Alexander