From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 84598 invoked by alias); 21 Nov 2018 11:35:21 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 84571 invoked by uid 89); 21 Nov 2018 11:35:20 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=mechanical, sk:reload_, alteration X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 21 Nov 2018 11:35:19 +0000 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=SVR-IES-MBX-03.mgc.mentorg.com) by relay1.mentorg.com with esmtps (TLSv1.2:ECDHE-RSA-AES256-SHA384:256) id 1gPQmo-0005Cg-Mp from Andrew_Stubbs@mentor.com ; Wed, 21 Nov 2018 03:35:14 -0800 Received: from [172.30.88.130] (137.202.0.90) by SVR-IES-MBX-03.mgc.mentorg.com (139.181.222.3) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Wed, 21 Nov 2018 11:35:10 +0000 Subject: Re: [PATCH 01/10] Fix IRA ICE. To: Jeff Law , References: From: Andrew Stubbs Message-ID: Date: Wed, 21 Nov 2018 11:35:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2018-11/txt/msg01822.txt.bz2 On 21/11/2018 00:47, Jeff Law wrote: > This seems like a really gross hack and sets an expectation that > generating registers in the target after IRA has started is OK. It is > not OK. THe fact that this works is, IMHO, likely an accident. What's the proper test for this? Neither lra_in_progress nor reload_in_progress is set here, and can_create_pseudos returns true. The patterns have the ability to not generate registers, but they don't know not to. Richard Sandiford has stated that it should be OK, but perhaps the other architectures also work by accident? In fact, since we're using LRA (not reload), my understanding is that I ought to be able to create new pseudos right up until reload_completed. (Although, my experience is that it's easy to get into an infinite loop doing that.) > I think this comes back to the fundamental representational issue with > the EXEC handling that still needs to be addressed. Undoubtedly, this makes it worse, but even without that I'd still want to expand vector memory moves long before split1, so at least some cases have to generate additional registers. (Perhaps IRA doesn't create memory moves though? I'm not sure.) I'm going to investigate how easy it is to fix the EXEC representation issues. I've been resisting because I had a deadline to make, and it's bound to be an invasive and destabilizing alteration (albeit largely mechanical), but if it's going to be a barrier to commit then probably it's become time. :-( Andrew