From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x62b.google.com (mail-pl1-x62b.google.com [IPv6:2607:f8b0:4864:20::62b]) by sourceware.org (Postfix) with ESMTPS id 88B97385696B for ; Wed, 6 Sep 2023 14:04:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 88B97385696B Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-1bdbf10333bso29064065ad.1 for ; Wed, 06 Sep 2023 07:04:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1694009062; x=1694613862; darn=gcc.gnu.org; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=nhei/mVAwyi7kU/wvt3kti0te2zscCnIeqmVMe6RuZ4=; b=p9HBFGtQYW6jIn1qXKSJMDz05XxBwTz9Wug2JRx6H9j/J+Pu13brOFCUOl/N/cpUcm Kb5UwQRas0bYBuO+SG+GSbQZ+naEVJzi4ngdWo+nwEx7JQ03reo+f9hjKpd+LbTqUXhh mXP4YNVXuO5GZq2+U+ql7GIMzF5LMDYctNqqwYZttwSElDP7C5QvKAwVWYNnqno7eCSs 0J4DJbkp0/tdQhwt3lRE2Wn/l/lE1uQkO80JAtTXg2IPSLvvdaLYe+8mq6IFvABr43oL mZwOYN+dFF6iUE1YM6yDZzQZOpA6vUMpeHd6pOArKhxrJMl7vuCbBd/hX714G99+EilW SDSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1694009062; x=1694613862; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=nhei/mVAwyi7kU/wvt3kti0te2zscCnIeqmVMe6RuZ4=; b=XszVtwxKO3+OdpRebUFguOpl/EuE3U4kKkgpDP2A563uFLLy/kd0qZPppd0rGrfmL8 iagPO16oJu2iPhUFot3tGf0b1tlzDlrq5lZ6+fTiQK0zFoXaYt4b3RXGh6jT8lYsI99a qeXGCUgfJPQAwrHgqpZiYqE1b09gLHY3hkKrjAcPvG5EsOQ+owu6dPTBhyX98ES5t7gZ RtkiYA77m5VMEyPA2lN/1htf4Oi7+encFWeMFX4w1Ti4JGD8x9npBMgwZvFD76JmxEL7 QGe4WNIiTKLd14pHd2rl+VSSj0PgEUz+9340rhdOdMlNxVtejdi64gWGCVEvWD/lCaMT RDxg== X-Gm-Message-State: AOJu0YzxinNaiNXn/Mqrtz28kaGlF60y4rOoBafuNDnbnlgwYUAb9cDq +82mSXLNb1uyAfodSV1nHV4= X-Google-Smtp-Source: AGHT+IGyvPtFOD9TnWJjb1gHu+CFtdRpnh13hsSIRDVsL57zDILvRNiIThFye6p5rwSsqMgx4X4nVw== X-Received: by 2002:a17:902:e74c:b0:1bd:c931:8c47 with SMTP id p12-20020a170902e74c00b001bdc9318c47mr18880707plf.68.1694009062361; Wed, 06 Sep 2023 07:04:22 -0700 (PDT) Received: from [172.31.0.109] ([136.36.130.248]) by smtp.gmail.com with ESMTPSA id 19-20020a170902c11300b001bbaf09ce15sm11125368pli.152.2023.09.06.07.04.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 06 Sep 2023 07:04:21 -0700 (PDT) Message-ID: Date: Wed, 6 Sep 2023 08:04:15 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/1] RISC-V: Add support for 'XVentanaCondOps' reusing 'Zicond' support Content-Language: en-US To: Tsukasa OI , Kito Cheng , Palmer Dabbelt , Andrew Waterman , Jim Wilson Cc: gcc-patches@gcc.gnu.org References: <018e6aa00b7ef8925919df999dfaf0330aebba72.1693979213.git.research_trasio@irq.a4lg.com> From: Jeff Law In-Reply-To: <018e6aa00b7ef8925919df999dfaf0330aebba72.1693979213.git.research_trasio@irq.a4lg.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 9/5/23 23:47, Tsukasa OI wrote: > From: Tsukasa OI > > 'XVentanaCondOps' is a vendor extension from Ventana Micro Systems > containing two instructions for conditional move and will be supported on > their Veyron V1 CPU. > > And most notably (for historical reasons), 'XVentanaCondOps' and the > standard 'Zicond' extension are functionally equivalent (only encodings and > instruction names are different). > > * czero.eqz == vt.maskc > * czero.nez == vt.maskcn > > This commit adds support for the 'XVentanaCondOps' extension by extending > 'Zicond' extension support. With this, we can now reuse the optimization > using the 'Zicond' extension for the 'XVentanaCondOps' extension. > > The specification for the 'XVentanaCondOps' extension is based on: > > > gcc/ChangeLog: > > * common/config/riscv/riscv-common.cc (riscv_ext_flag_table): > Parse 'XVentanaCondOps' extension. > * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New. > (TARGET_XVENTANACONDOPS): Ditto. > (TARGET_ZICOND_LIKE): New to represent targets with conditional > moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'. > * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND > with TARGET_ZICOND_LIKE. > (riscv_expand_conditional_move): Ditto. > * config/riscv/riscv.md (movcc): Replace TARGET_ZICOND with > TARGET_ZICOND_LIKE. > * config/riscv/riscv.opt: Add new riscv_xventana_subext. > * config/riscv/zicond.md: Modify description. > (eqz_ventana): New to match corresponding czero instructions. > (nez_ventana): Ditto. > (*czero..): Emit a 'XVentanaCondOps' instruction if > 'Zicond' is not available but 'XVentanaCondOps' + RV64 is. > (*czero..): Ditto. > (*czero.eqz..opt1): Ditto. > (*czero.nez..opt2): Ditto. > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/xventanacondops-primitiveSemantics.c: New test, > * gcc.target/riscv/xventanacondops-primitiveSemantics-rv32.c: New > test to make sure that XVentanaCondOps instructions are disabled > on RV32. > * gcc.target/riscv/xventanacondops-xor-01.c: New test, OK. Thanks for taking care of this. I guess Raphael and I should get more active on pushing the rest of the veyron-v1 bits upstream :-) Jeff