From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 77496 invoked by alias); 19 Oct 2018 13:42:47 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 76992 invoked by uid 89); 19 Oct 2018 13:42:47 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.6 required=5.0 tests=BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KHOP_DYNAMIC,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx07-00178001.pphosted.com Received: from mx08-00178001.pphosted.com (HELO mx07-00178001.pphosted.com) (91.207.212.93) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 19 Oct 2018 13:42:45 +0000 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w9JDdGgq027486 for ; Fri, 19 Oct 2018 15:42:43 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2n6x2u684h-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT) for ; Fri, 19 Oct 2018 15:42:43 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2529534 for ; Fri, 19 Oct 2018 13:42:43 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 128D92A49 for ; Fri, 19 Oct 2018 13:42:43 +0000 (GMT) Received: from [10.129.178.138] (10.75.127.46) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 19 Oct 2018 15:42:42 +0200 Subject: Re: [ARM/FDPIC v3 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp To: References: <20181011133518.17258-1-christophe.lyon@st.com> <20181011133518.17258-13-christophe.lyon@st.com> From: Christophe Lyon Message-ID: Date: Fri, 19 Oct 2018 14:02:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20181011133518.17258-13-christophe.lyon@st.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 8bit X-IsSubscribed: yes X-SW-Source: 2018-10/txt/msg01194.txt.bz2 On 11/10/2018 15:34, Christophe Lyon wrote: > We call __aeabi_read_tp() to get the thread pointer. Since this is a > function call, we have to restore the FDPIC register afterwards. > > 2018-XX-XX Christophe Lyon > Mickaël Guêné > > gcc/ > * config/arm/arm.c (arm_load_tp): Add FDPIC support. > * config/arm/arm.md (load_tp_soft_fdpic): New pattern. > (load_tp_soft): Disable in FDPIC mode. > > Change-Id: I0a2e3466c9afb869ad8e844083ad178de014658e > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > index d7b7d99..d3a60cb 100644 > --- a/gcc/config/arm/arm.c > +++ b/gcc/config/arm/arm.c > @@ -8646,7 +8646,25 @@ arm_load_tp (rtx target) > > rtx tmp; > > - emit_insn (gen_load_tp_soft ()); > + if (TARGET_FDPIC) > + { > + rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3)); > + > + emit_insn (gen_load_tp_soft_fdpic ()); > + > + /* Restore r9. */ > + XVECEXP (par, 0, 0) > + = gen_rtx_UNSPEC (VOIDmode, > + gen_rtvec (2, gen_rtx_REG (Pmode, FDPIC_REGNUM), > + get_hard_reg_initial_val (Pmode, FDPIC_REGNUM)), > + UNSPEC_PIC_RESTORE); > + XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode, FDPIC_REGNUM)); > + XVECEXP (par, 0, 2) > + = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, FDPIC_REGNUM)); There is the same problem here as in patch 04/21, fixed in follow-up version. > + emit_insn (par); > + } > + else > + emit_insn (gen_load_tp_soft ()); > > tmp = gen_rtx_REG (SImode, R0_REGNUM); > emit_move_insn (target, tmp); > diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md > index 09a0701..6fea087 100644 > --- a/gcc/config/arm/arm.md > +++ b/gcc/config/arm/arm.md > @@ -11485,12 +11485,25 @@ > ) > > ;; Doesn't clobber R1-R3. Must use r0 for the first operand. > +(define_insn "load_tp_soft_fdpic" > + [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS)) > + (clobber (reg:SI 9)) > + (clobber (reg:SI LR_REGNUM)) > + (clobber (reg:SI IP_REGNUM)) > + (clobber (reg:CC CC_REGNUM))] > + "TARGET_SOFT_TP && TARGET_FDPIC" > + "bl\\t__aeabi_read_tp\\t@ load_tp_soft" > + [(set_attr "conds" "clob") > + (set_attr "type" "branch")] > +) > + > +;; Doesn't clobber R1-R3. Must use r0 for the first operand. > (define_insn "load_tp_soft" > [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS)) > (clobber (reg:SI LR_REGNUM)) > (clobber (reg:SI IP_REGNUM)) > (clobber (reg:CC CC_REGNUM))] > - "TARGET_SOFT_TP" > + "TARGET_SOFT_TP && !TARGET_FDPIC" > "bl\\t__aeabi_read_tp\\t@ load_tp_soft" > [(set_attr "conds" "clob") > (set_attr "type" "branch")] >