From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 2AF0D385E003 for ; Wed, 12 Jun 2024 09:39:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 2AF0D385E003 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 2AF0D385E003 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718185150; cv=none; b=qJ4gUQC64LJmuqO9bCjNa4uuvbRrYgFyf7aHR8PcJzl60ceHL0293L/5OzKJ8acK99n14M3cxP2oRpSt5ekyTpTULbmyDoeCpph+GpGW1c16d6y4EHYAQDFVJqtpgI7hVBIoVSdxANB2N768noG/DZs+BlNuBC91aB/q6OnXod8= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718185150; c=relaxed/simple; bh=Oiw4EQX1subF6GMEZtrTmVqP1EiNltWwRjegvGyVJnM=; h=Subject:To:From:Message-ID:Date:MIME-Version; b=uSuNo+8V3IcvQk+mMW8RgDwkXHUj/xi3kRt+mF4Epwj7mx5UuHni5BYuH2ye+8hhiOBQTP5k57FejaKNsKUQellO7Rq5O1tKrmQ+0ONdKRzYhCFpNQ5mReD7DE+HIQIt16Hka8hWTuwdpXRVwrCkETrSlUFqJtBN8Inb0dhm/xs= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.20.4.107]) by gateway (Coremail) with SMTP id _____8Dxi+q2bGlmP_EFAA--.24567S3; Wed, 12 Jun 2024 17:39:02 +0800 (CST) Received: from [10.20.4.107] (unknown [10.20.4.107]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxBMW0bGlmHf8cAA--.60871S3; Wed, 12 Jun 2024 17:39:00 +0800 (CST) Subject: Re: [PATCH] LoongArch: Use bstrins for "value & (-1u << const)" To: Xi Ruoyao , gcc-patches@gcc.gnu.org Cc: i@xen0n.name, xuchenghua@loongson.cn References: <20240609134929.317546-1-xry111@xry111.site> From: Lulu Cheng Message-ID: Date: Wed, 12 Jun 2024 17:38:59 +0800 User-Agent: Mozilla/5.0 (X11; Linux loongarch64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <20240609134929.317546-1-xry111@xry111.site> Content-Type: text/plain; charset=gbk; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-CM-TRANSID:AQAAf8AxBMW0bGlmHf8cAA--.60871S3 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoWxJFWfZryfJFW7WFy3Wry3trc_yoW7JrW7p3 9rZ3WrKF48Jr92gwn2qa45Xrs8X397Cr129aySqrySkrW7WryDX3WxKr9xZF1DXw4Yqr1I qw4F9w1jva1jqacCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUv2b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r106r15McIj6I8E87Iv 67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IY64vIr41lc7I2V7IY0VAS07 AlzVAYIcxG8wCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02 F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw 1lIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7Cj xVAFwI0_Jr0_Gr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r 1j6r4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU8j- e5UUUUU== X-Spam-Status: No, score=-10.6 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,MIME_CHARSET_FARAWAY,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: LGTM! Thanks! ÔÚ 2024/6/9 ÏÂÎç9:48, Xi Ruoyao дµÀ: > A move/bstrins pair is as fast as a (addi.w|lu12i.w|lu32i.d|lu52i.d)/and > pair, and twice fast as a srli/slli pair. When the src reg and the dst > reg happens to be the same, the move instruction can be optimized away. > > gcc/ChangeLog: > > * config/loongarch/predicates.md (high_bitmask_operand): New > predicate. > * config/loongarch/constraints.md (Yy): New constriant. > * config/loongarch/loongarch.md (and3_align): New > define_insn_and_split. > > gcc/testsuite/ChangeLog: > > * gcc.target/loongarch/bstrins-1.c: New test. > * gcc.target/loongarch/bstrins-2.c: New test. > --- > > Bootstrapped and regtested on loongarch64-linux-gnu. Ok for trunk? > > gcc/config/loongarch/constraints.md | 5 +++++ > gcc/config/loongarch/loongarch.md | 17 +++++++++++++++++ > gcc/config/loongarch/predicates.md | 4 ++++ > gcc/testsuite/gcc.target/loongarch/bstrins-1.c | 9 +++++++++ > gcc/testsuite/gcc.target/loongarch/bstrins-2.c | 14 ++++++++++++++ > 5 files changed, 49 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/loongarch/bstrins-1.c > create mode 100644 gcc/testsuite/gcc.target/loongarch/bstrins-2.c > > diff --git a/gcc/config/loongarch/constraints.md b/gcc/config/loongarch/constraints.md > index f07d31650d2..12cf5e2924a 100644 > --- a/gcc/config/loongarch/constraints.md > +++ b/gcc/config/loongarch/constraints.md > @@ -94,6 +94,7 @@ > ;; "A constant @code{move_operand} that can be safely loaded using > ;; @code{la}." > ;; "Yx" > +;; "Yy" > ;; "Z" - > ;; "ZC" > ;; "A memory operand whose address is formed by a base register and offset > @@ -291,6 +292,10 @@ (define_constraint "Yx" > "@internal" > (match_operand 0 "low_bitmask_operand")) > > +(define_constraint "Yy" > + "@internal" > + (match_operand 0 "high_bitmask_operand")) > + > (define_constraint "YI" > "@internal > A replicated vector const in which the replicated value is in the range > diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md > index 5c80c169cbf..25c1d323ba0 100644 > --- a/gcc/config/loongarch/loongarch.md > +++ b/gcc/config/loongarch/loongarch.md > @@ -1542,6 +1542,23 @@ (define_insn "and3_extended" > [(set_attr "move_type" "pick_ins") > (set_attr "mode" "")]) > > +(define_insn_and_split "and3_align" > + [(set (match_operand:GPR 0 "register_operand" "=r") > + (and:GPR (match_operand:GPR 1 "register_operand" "r") > + (match_operand:GPR 2 "high_bitmask_operand" "Yy")))] > + "" > + "#" > + "" > + [(set (match_dup 0) (match_dup 1)) > + (set (zero_extract:GPR (match_dup 0) (match_dup 2) (const_int 0)) > + (const_int 0))] > +{ > + int len; > + > + len = low_bitmask_len (mode, ~INTVAL (operands[2])); > + operands[2] = GEN_INT (len); > +}) > + > (define_insn_and_split "*bstrins__for_mask" > [(set (match_operand:GPR 0 "register_operand" "=r") > (and:GPR (match_operand:GPR 1 "register_operand" "r") > diff --git a/gcc/config/loongarch/predicates.md b/gcc/config/loongarch/predicates.md > index eba7f246c84..58e406ea522 100644 > --- a/gcc/config/loongarch/predicates.md > +++ b/gcc/config/loongarch/predicates.md > @@ -293,6 +293,10 @@ (define_predicate "low_bitmask_operand" > (and (match_code "const_int") > (match_test "low_bitmask_len (mode, INTVAL (op)) > 12"))) > > +(define_predicate "high_bitmask_operand" > + (and (match_code "const_int") > + (match_test "low_bitmask_len (mode, ~INTVAL (op)) > 0"))) > + > (define_predicate "d_operand" > (and (match_code "reg") > (match_test "GP_REG_P (REGNO (op))"))) > diff --git a/gcc/testsuite/gcc.target/loongarch/bstrins-1.c b/gcc/testsuite/gcc.target/loongarch/bstrins-1.c > new file mode 100644 > index 00000000000..7cb3a952322 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/loongarch/bstrins-1.c > @@ -0,0 +1,9 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d" } */ > +/* { dg-final { scan-assembler "bstrins\\.d\t\\\$r4,\\\$r0,4,0" } } */ > + > +long > +x (long a) > +{ > + return a & -32; > +} > diff --git a/gcc/testsuite/gcc.target/loongarch/bstrins-2.c b/gcc/testsuite/gcc.target/loongarch/bstrins-2.c > new file mode 100644 > index 00000000000..9777f502e5a > --- /dev/null > +++ b/gcc/testsuite/gcc.target/loongarch/bstrins-2.c > @@ -0,0 +1,14 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d" } */ > +/* { dg-final { scan-assembler "bstrins\\.d\t\\\$r\[0-9\]+,\\\$r0,4,0" } } */ > + > +struct aligned_buffer { > + _Alignas(32) char x[1024]; > +}; > + > +extern int f(char *); > +int g(void) > +{ > + struct aligned_buffer buf; > + return f(buf.x); > +}