From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x434.google.com (mail-pf1-x434.google.com [IPv6:2607:f8b0:4864:20::434]) by sourceware.org (Postfix) with ESMTPS id BB3A83857C41 for ; Mon, 31 Jul 2023 16:19:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org BB3A83857C41 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-686b879f605so3098473b3a.1 for ; Mon, 31 Jul 2023 09:19:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690820374; x=1691425174; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=ma4SiTwS7Yjg9xyr/ZIvEVZNK7/gXB+jhZzdEPmzkwo=; b=dOwkQes+EnSHFMDnOo0YU8tvxlsN+VvuIa0KK6BXLV9UWCQZdwnbDuOrNslo132+CT Xb8kQim8hYDNP+iZA/VgB5C9Y3VXS4qvRaHpp3KTM0gXHNJopz7Ketcq9lOeTuY2jl7V Djhy19QFiAanwcezDyghXscsjfYDsh2zUz5KB4CB83OHQFdt2YpJcD4ZenFWjzEUADkO jphN7fhwRc5eTlwqxqDuDTySoi1ah6H+6EyoeEP3HIpdm78LdSBFHFLWI5He3TL45SEx qhzmY17LwxloQK5PcVIx5w0cWpPgTToO+gfbi+aPPlDMEudaOtpCTZD+Yog4xWaS5bsq nhPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690820374; x=1691425174; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=ma4SiTwS7Yjg9xyr/ZIvEVZNK7/gXB+jhZzdEPmzkwo=; b=U1PvtC3HqgDu1PwukEAfbhTjoQRvbOkOu5LiR5yUVW30o9wxITA5Z4FgsaQeQo9P0P 9upS2AfGkbSwGxb9s/mE7kQA98OMh1b9hdRWVfamQdbZaiebS2NHy/Fd2scceiEHPYXb WEZa67kI/WiJnxXhEvrk2MKOXx1wu9+M2/vi3vNwM2fuDKYPRciqWBxrp68Vgewrlsm2 VSJ0Ufnai5hIZdSZRR6oOBGpmqG/C9tPteeQXuqpv3nJeaG6oEh4qAdfl2GytzXWdcqj kBX9qAzjRKTD74CTNFFp2gjGA1+dNuck2NTdZP8BSz2n3DBvrGYeMDdwW9fnWgcEGQ4i ltKg== X-Gm-Message-State: ABy/qLZzgZqfiD5Wq7aCmnRua+MVforZTpRNcxW9BnufkfSr1YaMLTst Fh6paDjCNQsnSz4EwUGG1NxfxxUnOOHHi94hEBA= X-Google-Smtp-Source: APBJJlG3SOG8m5nldrkmm00C7F4EXHxuE1fke+1jUALVYiutAaFO876jDOFCt72/mxu/GyNYlsMe0g== X-Received: by 2002:a05:6a00:22c8:b0:687:35ab:d21f with SMTP id f8-20020a056a0022c800b0068735abd21fmr4628213pfj.22.1690820374224; Mon, 31 Jul 2023 09:19:34 -0700 (PDT) Received: from [10.0.17.156] ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id q20-20020a62ae14000000b006675c242548sm7735072pff.182.2023.07.31.09.19.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 31 Jul 2023 09:19:33 -0700 (PDT) Message-ID: Date: Mon, 31 Jul 2023 09:19:32 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: [Committed] RISC-V: Implement ISA Manual Table A.6 Mappings To: gcc-patches@gcc.gnu.org Cc: jeffreyalaw@gmail.com, palmer@rivosinc.com, vineetg@rivosinc.com, andrew@sifive.com, kito.cheng@sifive.com, dlustig@nvidia.com, cmuellner@gcc.gnu.org, andrea@rivosinc.com, hboehm@google.com, jakub@redhat.com References: <20230427162301.1151333-1-patrick@rivosinc.com> <20230725180206.284777-1-patrick@rivosinc.com> Content-Language: en-US From: Patrick O'Neill In-Reply-To: <20230725180206.284777-1-patrick@rivosinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: GCC 13.2 released[2] so I merged the series now that the branch is unfrozen. Thanks, Patrick [2] https://inbox.sourceware.org/gcc/ZMJeq%2FY5SN+7i8a+@tucnak/T/#u On 7/25/23 11:01, Patrick O'Neill wrote: > Discussed during the weekly RISC-V GCC meeting[1] and pre-approved by > Jeff Law. > If there aren't any objections I'll commit this cherry-picked series > on Thursday (July 27th). > > Patchset on trunk: > https://inbox.sourceware.org/gcc-patches/20230427162301.1151333-1-patrick@rivosinc.com/ > First commit: f37a36bce81b50a43ec1613c1d08d803642f7506 > > Also includes bugfix from: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109713 > commit: 4bd434fbfc7865961a8e10d7e9601b28765ce7be > > [1] https://inbox.sourceware.org/gcc/mhng-b7423fca-67ec-4ce4-9694-4e062632ceb0@palmer-ri-x1c9/T/#t > > Martin Liska (1): > riscv: fix error: control reaches end of non-void function > > Patrick O'Neill (11): > RISC-V: Eliminate SYNC memory models > RISC-V: Enforce Libatomic LR/SC SEQ_CST > RISC-V: Enforce subword atomic LR/SC SEQ_CST > RISC-V: Enforce atomic compare_exchange SEQ_CST > RISC-V: Add AMO release bits > RISC-V: Strengthen atomic stores > RISC-V: Eliminate AMO op fences > RISC-V: Weaken LR/SC pairs > RISC-V: Weaken mem_thread_fence > RISC-V: Weaken atomic loads > RISC-V: Table A.6 conformance tests > > gcc/config/riscv/riscv-protos.h | 3 + > gcc/config/riscv/riscv.cc | 66 ++++-- > gcc/config/riscv/sync.md | 196 ++++++++++++------ > .../riscv/amo-table-a-6-amo-add-1.c | 15 ++ > .../riscv/amo-table-a-6-amo-add-2.c | 15 ++ > .../riscv/amo-table-a-6-amo-add-3.c | 15 ++ > .../riscv/amo-table-a-6-amo-add-4.c | 15 ++ > .../riscv/amo-table-a-6-amo-add-5.c | 15 ++ > .../riscv/amo-table-a-6-compare-exchange-1.c | 9 + > .../riscv/amo-table-a-6-compare-exchange-2.c | 9 + > .../riscv/amo-table-a-6-compare-exchange-3.c | 9 + > .../riscv/amo-table-a-6-compare-exchange-4.c | 9 + > .../riscv/amo-table-a-6-compare-exchange-5.c | 9 + > .../riscv/amo-table-a-6-compare-exchange-6.c | 10 + > .../riscv/amo-table-a-6-compare-exchange-7.c | 9 + > .../gcc.target/riscv/amo-table-a-6-fence-1.c | 14 ++ > .../gcc.target/riscv/amo-table-a-6-fence-2.c | 15 ++ > .../gcc.target/riscv/amo-table-a-6-fence-3.c | 15 ++ > .../gcc.target/riscv/amo-table-a-6-fence-4.c | 15 ++ > .../gcc.target/riscv/amo-table-a-6-fence-5.c | 15 ++ > .../gcc.target/riscv/amo-table-a-6-load-1.c | 16 ++ > .../gcc.target/riscv/amo-table-a-6-load-2.c | 17 ++ > .../gcc.target/riscv/amo-table-a-6-load-3.c | 18 ++ > .../gcc.target/riscv/amo-table-a-6-store-1.c | 16 ++ > .../gcc.target/riscv/amo-table-a-6-store-2.c | 17 ++ > .../riscv/amo-table-a-6-store-compat-3.c | 18 ++ > .../riscv/amo-table-a-6-subword-amo-add-1.c | 9 + > .../riscv/amo-table-a-6-subword-amo-add-2.c | 9 + > .../riscv/amo-table-a-6-subword-amo-add-3.c | 9 + > .../riscv/amo-table-a-6-subword-amo-add-4.c | 9 + > .../riscv/amo-table-a-6-subword-amo-add-5.c | 9 + > gcc/testsuite/gcc.target/riscv/pr89835.c | 9 + > libgcc/config/riscv/atomic.c | 4 +- > 33 files changed, 563 insertions(+), 75 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-1.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-2.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-3.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-4.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-5.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-1.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-2.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-3.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-1.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-2.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-compat-3.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c > create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c > create mode 100644 gcc/testsuite/gcc.target/riscv/pr89835.c >