From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) by sourceware.org (Postfix) with ESMTPS id C7C4E3858CDA for ; Fri, 28 Jul 2023 16:42:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C7C4E3858CDA Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivosinc.com Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-1bba48b0bd2so14735825ad.3 for ; Fri, 28 Jul 2023 09:42:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20221208.gappssmtp.com; s=20221208; t=1690562567; x=1691167367; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=cX2nS8bO6qn5qowO3399e9VB63RZU6FQHxXRXQrmiFU=; b=olSuQaqaseGamorP39lO9XqZnXZIamCNbSplEH5Jf6Uaj/RiGUDlvNy7G0vRpW50/4 ADwIGXba3QFWHbkoWSmvqueWwh7da+9OghMfuhnB6wJpp9FZeAHh8aPRFl2Swiblz5Hr de16gTMQWjl8Py1N9bmOTef8JThiNQ/ZcOEnsaWg1VcBN/2RrlnSsNz+C2GtT3i4W2dY /0Q91JCNXRCLIjdQ+kZy8sfgS3ACXioyvQ8lP3GUn9r9lIefoAHHux7+Booo3YcKugTX ItvxSuV0NXzBHV/Dy/oDXMHPrWNi26yr5QjMTYFvsKHWiWN2rV1fsLC3Zd+dU49KL2B5 XAeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690562567; x=1691167367; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=cX2nS8bO6qn5qowO3399e9VB63RZU6FQHxXRXQrmiFU=; b=F218jb821wGiJJ4P1Z2leiorBK9qGG0k0hag7GSJZ7EL9gvMhS5ViWdog0BMhtSaQf 6NlgHM08dJgeJAM+bKZ5xp5uGx3AGkGIYt2lCUKvjgCk3W7DI9oMtnqUM5Hu3gdXp4RD AAwhWv8pSxiqkKyTPIyOa6or0uzF9UN4ZzQA2sn1oIBNWonNsI3tMVqGZBZyf1OKY8TC F3bZJnefhN18mCsWxxkI/8hDlT2hwxab9t+fQqY9RP7W1nl1DoLbtaFBAfz1hOssOZdM c4vRSd0EUKbzwqnKe/pdP9FkI1uCHmIRH4+XSm2X4r1cDbpCudjiGa9kl5DASqktGx6m wpUA== X-Gm-Message-State: ABy/qLaOGueTvvs3k5LB6oH16zvgB46bVDpQfXRExEabQNOZPyqUX6+s DYK/3PsiQcKPKd3KyAlbmFOg8PTcyN4/XtXGesw= X-Google-Smtp-Source: APBJJlHLg5JI1/oSIjjys3dThyPu8iaBIVHfclQ0lB8zDuIET71Sfe/sGS1nJxL0L/U5M/CbCzElgw== X-Received: by 2002:a17:902:c94f:b0:1bb:91f2:bb3e with SMTP id i15-20020a170902c94f00b001bb91f2bb3emr1891367pla.49.1690562567312; Fri, 28 Jul 2023 09:42:47 -0700 (PDT) Received: from [10.0.17.156] ([50.221.140.188]) by smtp.gmail.com with ESMTPSA id m24-20020a170902bb9800b001bbbbda70ccsm3806549pls.158.2023.07.28.09.42.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 28 Jul 2023 09:42:46 -0700 (PDT) Message-ID: Date: Fri, 28 Jul 2023 09:42:45 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH] RISC-V: Fix uninitialized and redundant use of which_alternative Content-Language: en-US To: Demin Han , Kito Cheng , "juzhe.zhong@rivai.ai" Cc: gcc-patches References: <20230727094859.3884298-1-demin.han@starfivetech.com> <4F1CE7168EFB3E1A+2023072718223714228879@rivai.ai> From: Patrick O'Neill In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-10.4 required=5.0 tests=BAYES_00,BODY_8BITS,DKIM_SIGNED,DKIM_VALID,GIT_PATCH_0,KAM_SHORT,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: No worries! I'm glad it was an easy fix ;) On 7/27/23 19:55, Demin Han wrote: > Sorry for not consider rv32 config. > The fix is OK. If convenient, please commit it. > > On 2023/7/28 4:46, Patrick O'Neill wrote: >> The newly added testcase fails on rv32 targets with this message: >> FAIL: gcc.target/riscv/rvv/autovec/madd-split2-1.c -O3 -ftree-vectorize (test for excess errors) >> >> verbose log: >> compiler exited with status 1 >> output is: >> cc1: error: ABI requires '-march=rv32' >> >> Something like this appears to fix the issue: >> >> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c >> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c >> index 14a9802667e..e10a9e9d0f5 100644 >> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c >> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c >> @@ -1,5 +1,5 @@ >>  /* { dg-do compile } */ >> -/* { dg-options "-march=rv64gcv_zvl256b -O3 -fno-cprop-registers -fno-dce --param riscv-autovec-preference=scalable" } */ >> +/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d -O3 >> -fno-cprop-registers -fno-dce --param riscv-autovec-preference=scalable" >>  } */ >> >>  long >>  foo (long *__restrict a, long *__restrict b, long n) >> >> On 7/27/23 04:57, Kito Cheng via Gcc-patches wrote: >> >>> My first impression is those emit_insn (gen_rtx_SET()) seems >>> necessary, but I got the point after I checked vector.md :P >>> >>> Committed to trunk, thanks :) >>> >>> >>> On Thu, Jul 27, 2023 at 6:23 PMjuzhe.zhong@rivai.ai >>>   wrote: >>>> Oh, YES. >>>> >>>> Thanks for fixing it. It makes sense since the ternary operations in "vector.md" >>>> generate "vmv.v.v" according to RA. >>>> >>>> Thanks for fixing it. >>>> >>>> @kito: Could you confirm it? If it's ok to you, commit it for Han (I am lazy to commit patches :). >>>> >>>> >>>> >>>> juzhe.zhong@rivai.ai >>>> >>>> From: demin.han >>>> Date: 2023-07-27 17:48 >>>> To:gcc-patches@gcc.gnu.org >>>> CC:kito.cheng@gmail.com;juzhe.zhong@rivai.ai >>>> Subject: [PATCH] RISC-V: Fix uninitialized and redundant use of which_alternative >>>> When pass split2 starts, which_alternative is random depending on >>>> last set of certain pass. >>>> >>>> Even initialized, the generated movement is redundant. >>>> The movement can be generated by assembly output template. >>>> >>>> Signed-off-by: demin.han >>>> >>>> gcc/ChangeLog: >>>> >>>> * config/riscv/autovec.md: Delete which_alternative use in split >>>> >>>> gcc/testsuite/ChangeLog: >>>> >>>> * gcc.target/riscv/rvv/autovec/madd-split2-1.c: New test. >>>> >>>> --- >>>> gcc/config/riscv/autovec.md                         | 12 ------------ >>>> .../gcc.target/riscv/rvv/autovec/madd-split2-1.c    | 13 +++++++++++++ >>>> 2 files changed, 13 insertions(+), 12 deletions(-) >>>> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c >>>> >>>> diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md >>>> index d899922586a..b7ea3101f5a 100644 >>>> --- a/gcc/config/riscv/autovec.md >>>> +++ b/gcc/config/riscv/autovec.md >>>> @@ -1012,8 +1012,6 @@ (define_insn_and_split "*fma" >>>>     [(const_int 0)] >>>>     { >>>>       riscv_vector::emit_vlmax_vsetvl (mode, operands[4]); >>>> -    if (which_alternative == 2) >>>> -      emit_insn (gen_rtx_SET (operands[0], operands[3])); >>>>       rtx ops[] = {operands[0], operands[1], operands[2], operands[3], operands[0]}; >>>>       riscv_vector::emit_vlmax_ternary_insn (code_for_pred_mul_plus (mode), >>>>     riscv_vector::RVV_TERNOP, ops, operands[4]); >>>> @@ -1058,8 +1056,6 @@ (define_insn_and_split "*fnma" >>>>     [(const_int 0)] >>>>     { >>>>       riscv_vector::emit_vlmax_vsetvl (mode, operands[4]); >>>> -    if (which_alternative == 2) >>>> -      emit_insn (gen_rtx_SET (operands[0], operands[3])); >>>>       rtx ops[] = {operands[0], operands[1], operands[2], operands[3], operands[0]}; >>>>       riscv_vector::emit_vlmax_ternary_insn (code_for_pred_minus_mul (mode), >>>>          riscv_vector::RVV_TERNOP, ops, operands[4]); >>>> @@ -1102,8 +1098,6 @@ (define_insn_and_split "*fma" >>>>     [(const_int 0)] >>>>     { >>>>       riscv_vector::emit_vlmax_vsetvl (mode, operands[4]); >>>> -    if (which_alternative == 2) >>>> -      emit_insn (gen_rtx_SET (operands[0], operands[3])); >>>>       rtx ops[] = {operands[0], operands[1], operands[2], operands[3], operands[0]}; >>>>       riscv_vector::emit_vlmax_fp_ternary_insn (code_for_pred_mul (PLUS, mode), >>>>        riscv_vector::RVV_TERNOP, ops, operands[4]); >>>> @@ -1148,8 +1142,6 @@ (define_insn_and_split "*fnma" >>>>     [(const_int 0)] >>>>     { >>>>       riscv_vector::emit_vlmax_vsetvl (mode, operands[4]); >>>> -    if (which_alternative == 2) >>>> -      emit_insn (gen_rtx_SET (operands[0], operands[3])); >>>>       rtx ops[] = {operands[0], operands[1], operands[2], operands[3], operands[0]}; >>>>       riscv_vector::emit_vlmax_fp_ternary_insn (code_for_pred_mul_neg (PLUS, mode), >>>>        riscv_vector::RVV_TERNOP, ops, operands[4]); >>>> @@ -1194,8 +1186,6 @@ (define_insn_and_split "*fms" >>>>     [(const_int 0)] >>>>     { >>>>       riscv_vector::emit_vlmax_vsetvl (mode, operands[4]); >>>> -    if (which_alternative == 2) >>>> -      emit_insn (gen_rtx_SET (operands[0], operands[3])); >>>>       rtx ops[] = {operands[0], operands[1], operands[2], operands[3], operands[0]}; >>>>       riscv_vector::emit_vlmax_fp_ternary_insn (code_for_pred_mul (MINUS, mode), >>>>        riscv_vector::RVV_TERNOP, ops, operands[4]); >>>> @@ -1242,8 +1232,6 @@ (define_insn_and_split "*fnms" >>>>     [(const_int 0)] >>>>     { >>>>       riscv_vector::emit_vlmax_vsetvl (mode, operands[4]); >>>> -    if (which_alternative == 2) >>>> -      emit_insn (gen_rtx_SET (operands[0], operands[3])); >>>>       rtx ops[] = {operands[0], operands[1], operands[2], operands[3], operands[0]}; >>>>       riscv_vector::emit_vlmax_fp_ternary_insn (code_for_pred_mul_neg (MINUS, mode), >>>>        riscv_vector::RVV_TERNOP, ops, operands[4]); >>>> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c >>>> new file mode 100644 >>>> index 00000000000..14a9802667e >>>> --- /dev/null >>>> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/madd-split2-1.c >>>> @@ -0,0 +1,13 @@ >>>> +/* { dg-do compile } */ >>>> +/* { dg-options "-march=rv64gcv_zvl256b -O3 -fno-cprop-registers -fno-dce --param riscv-autovec-preference=scalable" } */ >>>> + >>>> +long >>>> +foo (long *__restrict a, long *__restrict b, long n) >>>> +{ >>>> +  long i; >>>> +  for (i = 0; i < n; ++i) >>>> +    a[i] = b[i] + i * 8; >>>> +  return a[1]; >>>> +} >>>> + >>>> +/* { dg-final { scan-assembler-times {\tvmv1r\.v} 1 } } */ >>>> -- >>>> 2.41.0 >>>> >>>>