From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4570 invoked by alias); 6 Jun 2008 13:33:33 -0000 Received: (qmail 4553 invoked by uid 22791); 6 Jun 2008 13:33:32 -0000 X-Spam-Check-By: sourceware.org Received: from yw-out-1718.google.com (HELO yw-out-1718.google.com) (74.125.46.155) by sourceware.org (qpsmtpd/0.31) with ESMTP; Fri, 06 Jun 2008 13:33:15 +0000 Received: by yw-out-1718.google.com with SMTP id 5so544821ywm.26 for ; Fri, 06 Jun 2008 06:33:13 -0700 (PDT) Received: by 10.150.217.18 with SMTP id p18mr251732ybg.67.1212759193416; Fri, 06 Jun 2008 06:33:13 -0700 (PDT) Received: by 10.150.152.8 with HTTP; Fri, 6 Jun 2008 06:33:13 -0700 (PDT) Message-ID: Date: Fri, 06 Jun 2008 13:33:00 -0000 From: "Gunnar Von Boehn" To: gcc-patches@gcc.gnu.org Subject: Fix for GCC Bugzilla Bug 36133 MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_Part_7353_7723598.1212759193418" Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2008-06/txt/msg00317.txt.bz2 ------=_Part_7353_7723598.1212759193418 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline Content-length: 1602 Hi, I'm hereby emailing you again, the test case and patch that are included to the GCC bugtracker of Bug 36133. Problem desciption: --------------------------- GCC 68k/Coldfire backends creates unnecessary TST instructions. On the 68k/Coldfire many instructions do set the Condition Codes automaticly. GCC is not aware of this and GCC creates unneeded TST instructions to create these conditions code again. Fix: ---- Add instrutcition definitions to machine description to inform GCC about the instructions setting the conditions codes. How to reproduce: ------------------------- Compile this example function withand look at the produces ASM code. m68k-linux-gnu-gcc -mcpu=54455 -o example -Os -fomit-frame-pointer example.c void * copy_32x4a(void *destparam, const void *srcparam, size_t size) { int *dest = destparam; const int *src = srcparam; int size32; size32 = size / 16; for (; size32; size32--) { *dest++ = *src++; *dest++ = *src++; *dest++ = *src++; *dest++ = *src++; } } Look at the code and see that GCC is not aware that LSRL and the SUBQL do both set the condition codes already, there is no need for using an extra TST instruction at all. Please apply the patch and recompile. GCC is now aware that the LSR instruction does set the CC already and will not create the unneeded TST. Please mind that the attached patch will fix only the SHIFT instruction. Can you use this example for the other 68K instructions, or shall I help with this? Kind regards Gunnar von Boehn ------=_Part_7353_7723598.1212759193418 Content-Type: text/x-patch; name=GCC36133.patch Content-Transfer-Encoding: base64 X-Attachment-Id: f_fh4sbwvv0 Content-Disposition: attachment; filename=GCC36133.patch Content-length: 1212 SW5kZXg6IGdjYy9jb25maWcvbTY4ay9tNjhrLm1kCj09PT09PT09PT09PT09 PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09PT09 PT09PT09PT0KKioqIGdjYy9jb25maWcvbTY4ay9tNjhrLm1kLm9yaWcgICAg ICAgIDIwMDgtMDUtMzAgMTA6MDA6NTUuMDAwMDAwMDAwICswMjAwCi0tLSBn Y2MvY29uZmlnL202OGsvbTY4ay5tZCAgICAgMjAwOC0wNi0wNCAxNzowMTox MS4wMDAwMDAwMDAgKzAyMDAKKioqKioqKioqKioqKioqCioqKiA1MTk4LDUy MDMgKioqKgotLS0gNTE5OCw1MjE1IC0tLS0KICAgIFsoc2V0X2F0dHIgInR5 cGUiICJzaGlmdCIpCiAgICAgKHNldF9hdHRyICJvcHkiICIyIildKQoKKyAo ZGVmaW5lX2luc24gIipsc2hyc2kzX2NjIgorICAgWyhzZXQgKGNjMCkKKyAg ICAgICAobHNoaWZ0cnQ6U0kgKG1hdGNoX29wZXJhbmQ6U0kgMSAicmVnaXN0 ZXJfb3BlcmFuZCIgIjAiKQorICAgICAgICAgICAgICAgICAgICAobWF0Y2hf b3BlcmFuZDpTSSAyICJnZW5lcmFsX29wZXJhbmQiICJkSSIpKSkKKyAgICAo c2V0IChtYXRjaF9vcGVyYW5kOlNJIDAgInJlZ2lzdGVyX29wZXJhbmQiICI9 ZCIpCisgICAgICAgKGxzaGlmdHJ0OlNJIChtYXRjaF9kdXAgMSkKKyAgICAg ICAgICAgICAgICAgICAgKG1hdGNoX2R1cCAyKSkpXQorICAgIiIKKyAgICJs c3IlLmwgJTIsJTAiCisgICBbKHNldF9hdHRyICJ0eXBlIiAic2hpZnQiKQor ICAgIChzZXRfYXR0ciAib3B5IiAiMiIpXSkKKwogIChkZWZpbmVfaW5zbiAi bHNocmhpMyIKICAgIFsoc2V0IChtYXRjaF9vcGVyYW5kOkhJIDAgInJlZ2lz dGVyX29wZXJhbmQiICI9ZCIpCiAgICAgICAgKGxzaGlmdHJ0OkhJIChtYXRj aF9vcGVyYW5kOkhJIDEgInJlZ2lzdGVyX29wZXJhbmQiICIwIikK ------=_Part_7353_7723598.1212759193418--