From: Srinath Parvathaneni <Srinath.Parvathaneni@arm.com>
To: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: nd <nd@arm.com>, Richard Earnshaw <Richard.Earnshaw@arm.com>,
Ramana Radhakrishnan <Ramana.Radhakrishnan@arm.com>,
Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
Subject: [ARM][PATCH 2/2] Remove redundant constructs added for FP16 support.
Date: Wed, 29 May 2019 14:48:00 -0000 [thread overview]
Message-ID: <b9c8fd5a-ba38-bc04-1e5e-1a701627ce68@arm.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 1691 bytes --]
Hello,
The patch reworks some of the VRND and VCVT code added for the FP16
extension support to remove the redundant UNSPECS and related
constructs.
Tested for arm-none-linux-gnueabihf with native bootstrap and make check
and for arm-none-eabi with cross-compiled check-gcc on an
ARMv8.4-A emulator.
Ok for trunk? If ok, could someone please commit the patch on my behalf,
I don't have commit rights.
2019-05-29 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Matthew Wahab <matthew.wahab@arm.com>
* config/arm/iterators.md (VCVT_HF_US_N): Remove.
(VCVT_SI_US_N): Remove.
(VCVT_HF_US): Remove.
(VCVTH_US): Remove.
(FP16_RND): Remove.
(sup): Remove UNSPEC_VCVTA_S, UNSPEC_VCVTA_U, UNSPEC_VCVTM_S,
UNSPEC_VCVTM_U, UNSPEC_VCVTN_S, UNSPEC_VCVTN_U, UNSPEC_VCVTP_S,
UNSPEC_VCVTP_U, UNSPEC_VCVT_HF_S_N, UNSPEC_VCVT_HF_U_N,
UNSPEC_VCVT_SI_S_N, UNSPEC_VCVT_SI_U_N, UNSPEC_VCVTH_S,
UNSPEC_VCVTH_U.
(vcvth_op): Remove.
(fp16_rnd_insn): Remove.
* config/arm/unspecs.md: Remove UNSPEC_VCVT_HF_S_N,
UNSPEC_VCVT_HF_U_N, UNSPEC_VCVT_SI_S_N, UNSPEC_VCVT_SI_U_N,
UNSPEC_VCVTH_S, UNSPEC_VCVTH_U, UNSPEC_VCVTA_S, UNSPEC_VCVTA_U,
UNSPEC_VCVTM_S, UNSPEC_VCVTM_U, UNSPEC_VCVTN_S, UNSPEC_VCVTN_U,
UNSPEC_VCVTP_S, UNSPEC_VCVTP_U, UNSPEC_VRND, UNSPEC_VRNDA,
UNSPEC_VRNDI, UNSPEC_VRNDM, UNSPEC_VRNDN, UNSPEC_VRNDP,
UNSPEC_VRNDX.
* config/arm/vfp.md (neon_vcvth<sup>hf): Replace VCVTH_US with
VCVT_US.
(neon_vcvth<sup>si): Likewise.
(neon_vcvth<sup>_nhf_unspec): Replace VCVTH_US_N with VCVT_US_N.
(neon_vcvth<sup>_nhf): Likewise.
(neon_vcvth<sup>_nsi_unspec): Replace VCVTH_SI_US_N with
VCVT_US_N.
(neon_vcvth<sup>_nsi): Likewise.
[-- Attachment #2: rb10544.patch --]
[-- Type: application/octet-stream, Size: 5497 bytes --]
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index 13455d4d06df80cfe5b855b45f2607262fd233df..57a2223cd263682577d60db5655a071154c38b3d 100644
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -365,22 +365,6 @@
(define_int_iterator VCVT_US_N [UNSPEC_VCVT_S_N UNSPEC_VCVT_U_N])
-(define_int_iterator VCVT_HF_US_N [UNSPEC_VCVT_HF_S_N UNSPEC_VCVT_HF_U_N])
-
-(define_int_iterator VCVT_SI_US_N [UNSPEC_VCVT_SI_S_N UNSPEC_VCVT_SI_U_N])
-
-(define_int_iterator VCVT_HF_US [UNSPEC_VCVTA_S UNSPEC_VCVTA_U
- UNSPEC_VCVTM_S UNSPEC_VCVTM_U
- UNSPEC_VCVTN_S UNSPEC_VCVTN_U
- UNSPEC_VCVTP_S UNSPEC_VCVTP_U])
-
-(define_int_iterator VCVTH_US [UNSPEC_VCVTH_S UNSPEC_VCVTH_U])
-
-;; Operators for FP16 instructions.
-(define_int_iterator FP16_RND [UNSPEC_VRND UNSPEC_VRNDA
- UNSPEC_VRNDM UNSPEC_VRNDN
- UNSPEC_VRNDP UNSPEC_VRNDX])
-
(define_int_iterator VQMOVN [UNSPEC_VQMOVN_S UNSPEC_VQMOVN_U])
(define_int_iterator VMOVL [UNSPEC_VMOVL_S UNSPEC_VMOVL_U])
@@ -843,13 +827,7 @@
(UNSPEC_VPMAX "s") (UNSPEC_VPMAX_U "u")
(UNSPEC_VPMIN "s") (UNSPEC_VPMIN_U "u")
(UNSPEC_VCVT_S "s") (UNSPEC_VCVT_U "u")
- (UNSPEC_VCVTA_S "s") (UNSPEC_VCVTA_U "u")
- (UNSPEC_VCVTM_S "s") (UNSPEC_VCVTM_U "u")
- (UNSPEC_VCVTN_S "s") (UNSPEC_VCVTN_U "u")
- (UNSPEC_VCVTP_S "s") (UNSPEC_VCVTP_U "u")
(UNSPEC_VCVT_S_N "s") (UNSPEC_VCVT_U_N "u")
- (UNSPEC_VCVT_HF_S_N "s") (UNSPEC_VCVT_HF_U_N "u")
- (UNSPEC_VCVT_SI_S_N "s") (UNSPEC_VCVT_SI_U_N "u")
(UNSPEC_VQMOVN_S "s") (UNSPEC_VQMOVN_U "u")
(UNSPEC_VMOVL_S "s") (UNSPEC_VMOVL_U "u")
(UNSPEC_VSHL_S "s") (UNSPEC_VSHL_U "u")
@@ -864,7 +842,6 @@
(UNSPEC_VSHLL_S_N "s") (UNSPEC_VSHLL_U_N "u")
(UNSPEC_VSRA_S_N "s") (UNSPEC_VSRA_U_N "u")
(UNSPEC_VRSRA_S_N "s") (UNSPEC_VRSRA_U_N "u")
- (UNSPEC_VCVTH_S "s") (UNSPEC_VCVTH_U "u")
(UNSPEC_DOT_S "s") (UNSPEC_DOT_U "u")
])
@@ -874,12 +851,6 @@
(define_int_attr vfml_half_selector
[(UNSPEC_VFML_HI "true") (UNSPEC_VFML_LO "false")])
-(define_int_attr vcvth_op
- [(UNSPEC_VCVTA_S "a") (UNSPEC_VCVTA_U "a")
- (UNSPEC_VCVTM_S "m") (UNSPEC_VCVTM_U "m")
- (UNSPEC_VCVTN_S "n") (UNSPEC_VCVTN_U "n")
- (UNSPEC_VCVTP_S "p") (UNSPEC_VCVTP_U "p")])
-
(define_int_attr fp16_rnd_str
[(UNSPEC_VRINTZ "rnd") (UNSPEC_VRINTA "rnda")
(UNSPEC_VRINTM "rndm") (UNSPEC_VRINTP "rndp")
@@ -888,11 +859,6 @@
(UNSPEC_NVRINTM "rndm") (UNSPEC_NVRINTN "rndn")
(UNSPEC_NVRINTP "rndp") (UNSPEC_NVRINTX "rndx")])
-(define_int_attr fp16_rnd_insn
- [(UNSPEC_VRND "vrintz") (UNSPEC_VRNDA "vrinta")
- (UNSPEC_VRNDM "vrintm") (UNSPEC_VRNDN "vrintn")
- (UNSPEC_VRNDP "vrintp") (UNSPEC_VRNDX "vrintx")])
-
(define_int_attr cmp_op_unsp [(UNSPEC_VCEQ "eq") (UNSPEC_VCGT "gt")
(UNSPEC_VCGE "ge") (UNSPEC_VCLE "le")
(UNSPEC_VCLT "lt") (UNSPEC_VCAGE "ge")
diff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md
index 41d0d431453d9515ecee5e3e7d07b00bfd1ae33f..45a66557ae46f9268024b238803e779df47a5a1f 100644
--- a/gcc/config/arm/unspecs.md
+++ b/gcc/config/arm/unspecs.md
@@ -231,20 +231,6 @@
UNSPEC_VCVT_U
UNSPEC_VCVT_S_N
UNSPEC_VCVT_U_N
- UNSPEC_VCVT_HF_S_N
- UNSPEC_VCVT_HF_U_N
- UNSPEC_VCVT_SI_S_N
- UNSPEC_VCVT_SI_U_N
- UNSPEC_VCVTH_S
- UNSPEC_VCVTH_U
- UNSPEC_VCVTA_S
- UNSPEC_VCVTA_U
- UNSPEC_VCVTM_S
- UNSPEC_VCVTM_U
- UNSPEC_VCVTN_S
- UNSPEC_VCVTN_U
- UNSPEC_VCVTP_S
- UNSPEC_VCVTP_U
UNSPEC_VEXT
UNSPEC_VHADD_S
UNSPEC_VHADD_U
@@ -409,13 +395,6 @@
UNSPEC_NVRINTN
UNSPEC_VQRDMLAH
UNSPEC_VQRDMLSH
- UNSPEC_VRND
- UNSPEC_VRNDA
- UNSPEC_VRNDI
- UNSPEC_VRNDM
- UNSPEC_VRNDN
- UNSPEC_VRNDP
- UNSPEC_VRNDX
UNSPEC_DOT_S
UNSPEC_DOT_U
UNSPEC_VFML_LO
diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index 3c303da756dcb660b56118bf4748ca987b7a91e0..c15831e7a8450d131478c6f99a23a88f69eda64b 100644
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -1764,7 +1764,7 @@
[(set (match_operand:HF 0 "s_register_operand" "=w")
(unspec:HF
[(match_operand:SI 1 "s_register_operand" "w")]
- VCVTH_US))]
+ VCVT_US))]
"TARGET_VFP_FP16INST"
"vcvt.f16.<sup>%#32\t%0, %1"
[(set_attr "conds" "unconditional")
@@ -1775,7 +1775,7 @@
[(set (match_operand:SI 0 "s_register_operand" "=w")
(unspec:SI
[(match_operand:HF 1 "s_register_operand" "w")]
- VCVTH_US))]
+ VCVT_US))]
"TARGET_VFP_FP16INST"
"vcvt.<sup>%#32.f16\t%0, %1"
[(set_attr "conds" "unconditional")
@@ -1795,7 +1795,7 @@
(unspec:SI
[(match_operand:SI 1 "s_register_operand" "0")
(match_operand:SI 2 "immediate_operand" "i")]
- VCVT_HF_US_N))
+ VCVT_US_N))
(set
(match_operand:HF 3 "s_register_operand" "=w")
(float_truncate:HF (float:SF (match_dup 0))))]
@@ -1813,7 +1813,7 @@
[(match_operand:HF 0 "s_register_operand")
(unspec:HF [(match_operand:SI 1 "s_register_operand")
(match_operand:SI 2 "immediate_operand")]
- VCVT_HF_US_N)]
+ VCVT_US_N)]
"TARGET_VFP_FP16INST"
{
rtx op1 = gen_reg_rtx (SImode);
@@ -1839,7 +1839,7 @@
(float_extend:SF
(match_operand:HF 1 "s_register_operand" "w"))))
(match_operand:SI 2 "immediate_operand" "i")]
- VCVT_SI_US_N))]
+ VCVT_US_N))]
"TARGET_VFP_FP16INST"
{
arm_const_bounds (operands[2], 1, 33);
@@ -1855,7 +1855,7 @@
(unspec:SI
[(match_operand:HF 1 "s_register_operand")
(match_operand:SI 2 "immediate_operand")]
- VCVT_SI_US_N)]
+ VCVT_US_N)]
"TARGET_VFP_FP16INST"
{
rtx op1 = gen_reg_rtx (SImode);
next reply other threads:[~2019-05-29 14:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-29 14:48 Srinath Parvathaneni [this message]
2019-07-23 16:11 ` Srinath Parvathaneni
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