From: "Richard Earnshaw (lists)" <Richard.Earnshaw@arm.com>
To: Christophe Lyon <christophe.lyon@linaro.org>,
gcc-patches@gcc.gnu.org, Kyrylo.Tkachov@arm.com
Subject: Re: [PATCH 2/2] [testsuite, arm]: Make mve_fp_fpu[12].c accept single or double precision FPU
Date: Wed, 28 Jun 2023 11:20:18 +0100 [thread overview]
Message-ID: <bb14d022-0017-6814-9407-97ebe4f076c5@arm.com> (raw)
In-Reply-To: <20230628092631.3173114-2-christophe.lyon@linaro.org>
On 28/06/2023 10:26, Christophe Lyon via Gcc-patches wrote:
> This tests currently expect a directive containing .fpu fpv5-sp-d16
> and thus may fail if the test is executed for instance with
> -march=armv8.1-m.main+mve.fp+fp.dp
>
> This patch accepts either fpv5-sp-d16 or fpv5-d16 to avoid the failure.
>
> 2023-06-28 Christophe Lyon <christophe.lyon@linaro.org>
>
> gcc/testsuite/
> * gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c: Fix .fpu
> scan-assembler.
> * gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c: Likewise.
> ---
> gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c | 2 +-
> gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c
> index e375327fb97..8358a616bb5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c
> @@ -12,4 +12,4 @@ foo1 (int8x16_t value)
> return b;
> }
>
> -/* { dg-final { scan-assembler "\.fpu fpv5-sp-d16" } } */
> +/* { dg-final { scan-assembler "\.fpu fpv5(-sp|)-d16" } } */
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c
> index 1fca1100cf0..5dd2feefc35 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c
> @@ -12,4 +12,4 @@ foo1 (int8x16_t value)
> return b;
> }
>
> -/* { dg-final { scan-assembler "\.fpu fpv5-sp-d16" } } */
> +/* { dg-final { scan-assembler "\.fpu fpv5(-sp|)-d16" } } */
OK.
next prev parent reply other threads:[~2023-06-28 10:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-28 9:26 [PATCH 1/2] [testsuite,arm]: Make nomve_fp_1.c require arm_fp Christophe Lyon
2023-06-28 9:26 ` [PATCH 2/2] [testsuite,arm]: Make mve_fp_fpu[12].c accept single or double precision FPU Christophe Lyon
2023-06-28 10:20 ` Richard Earnshaw (lists) [this message]
2023-06-28 10:20 ` [PATCH 1/2] [testsuite,arm]: Make nomve_fp_1.c require arm_fp Richard Earnshaw (lists)
2023-07-13 10:21 Christophe Lyon
2023-07-13 10:21 ` [PATCH 2/2] [testsuite,arm]: Make mve_fp_fpu[12].c accept single or double precision FPU Christophe Lyon
2023-07-14 15:44 ` Kyrylo Tkachov
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