From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 98A633858418 for ; Wed, 28 Jun 2023 10:20:20 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 98A633858418 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E796EC14; Wed, 28 Jun 2023 03:21:03 -0700 (PDT) Received: from [10.2.78.54] (e120077-lin.cambridge.arm.com [10.2.78.54]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A56363F663; Wed, 28 Jun 2023 03:20:19 -0700 (PDT) Message-ID: Date: Wed, 28 Jun 2023 11:20:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 2/2] [testsuite, arm]: Make mve_fp_fpu[12].c accept single or double precision FPU Content-Language: en-GB To: Christophe Lyon , gcc-patches@gcc.gnu.org, Kyrylo.Tkachov@arm.com References: <20230628092631.3173114-1-christophe.lyon@linaro.org> <20230628092631.3173114-2-christophe.lyon@linaro.org> From: "Richard Earnshaw (lists)" In-Reply-To: <20230628092631.3173114-2-christophe.lyon@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3498.8 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,KAM_SHORT,NICE_REPLY_A,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 28/06/2023 10:26, Christophe Lyon via Gcc-patches wrote: > This tests currently expect a directive containing .fpu fpv5-sp-d16 > and thus may fail if the test is executed for instance with > -march=armv8.1-m.main+mve.fp+fp.dp > > This patch accepts either fpv5-sp-d16 or fpv5-d16 to avoid the failure. > > 2023-06-28 Christophe Lyon > > gcc/testsuite/ > * gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c: Fix .fpu > scan-assembler. > * gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c: Likewise. > --- > gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c | 2 +- > gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c > index e375327fb97..8358a616bb5 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu1.c > @@ -12,4 +12,4 @@ foo1 (int8x16_t value) > return b; > } > > -/* { dg-final { scan-assembler "\.fpu fpv5-sp-d16" } } */ > +/* { dg-final { scan-assembler "\.fpu fpv5(-sp|)-d16" } } */ > diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c > index 1fca1100cf0..5dd2feefc35 100644 > --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c > +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_fp_fpu2.c > @@ -12,4 +12,4 @@ foo1 (int8x16_t value) > return b; > } > > -/* { dg-final { scan-assembler "\.fpu fpv5-sp-d16" } } */ > +/* { dg-final { scan-assembler "\.fpu fpv5(-sp|)-d16" } } */ OK.