From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id 8E45B3B51BCB for ; Mon, 19 Dec 2022 06:14:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 8E45B3B51BCB Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2BJ5iRoG029836; Mon, 19 Dec 2022 06:14:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=pp1; bh=0pMhuaO7gFGF4oQCTVjK7H5K1mr5PfnwNWfDpWucdTI=; b=pGkvNofHSNJnt1GTWa8eB6J8LNxfaOQoafQMNE0bvmf6zdtYgZC06QfN/PPxJESS++2A aMof58YXbaVep2uYiP8Dnc39NggnR7cLESfqaGA7gu0IKs8x9ZcZRxg/o6XzuzOxIV6h K/8sPLV7CdWybwGD0Sny/eV765zfc8PFupxyrlGSzXNVFLpitiluW8ZjJjMq6YCFEEWc 3FkC8ytOb/m16jXGHOYgZ092baoAI9HOCVe2BYE+ht4QERN6idAFzfnAJcaY42HQOuKn qockCUcQvcR1Iiva6m97FAi+5Q+xKCWYuIsL/fdsLceTmKOO9evIIFtZIpuLqPzRAuVI Xg== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3mjj2x8m8w-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 19 Dec 2022 06:14:00 +0000 Received: from m0098409.ppops.net (m0098409.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 2BJ6D1FK016998; Mon, 19 Dec 2022 06:13:59 GMT Received: from ppma03ams.nl.ibm.com (62.31.33a9.ip4.static.sl-reverse.com [169.51.49.98]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3mjj2x8m85-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 19 Dec 2022 06:13:59 +0000 Received: from pps.filterd (ppma03ams.nl.ibm.com [127.0.0.1]) by ppma03ams.nl.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 2BJ1Mp3x014024; Mon, 19 Dec 2022 06:13:57 GMT Received: from smtprelay02.fra02v.mail.ibm.com ([9.218.2.226]) by ppma03ams.nl.ibm.com (PPS) with ESMTPS id 3mh6yw1xp0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 19 Dec 2022 06:13:57 +0000 Received: from smtpav03.fra02v.mail.ibm.com (smtpav03.fra02v.mail.ibm.com [10.20.54.102]) by smtprelay02.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 2BJ6DrVG46137638 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 19 Dec 2022 06:13:53 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 52F112004B; Mon, 19 Dec 2022 06:13:53 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 53CCC20043; Mon, 19 Dec 2022 06:13:51 +0000 (GMT) Received: from [9.197.234.5] (unknown [9.197.234.5]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 19 Dec 2022 06:13:50 +0000 (GMT) Message-ID: Date: Mon, 19 Dec 2022 14:13:49 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Subject: Re: [PATCH] rs6000: Fix some issues related to Power10 fusion [PR104024] Content-Language: en-US To: Segher Boessenkool Cc: GCC Patches , Peter Bergner , Michael Meissner , David Edelsohn References: <009fda27-7119-6de8-8dbe-51126bdfca12@linux.ibm.com> <20221214222944.GR25951@gate.crashing.org> From: "Kewen.Lin" In-Reply-To: <20221214222944.GR25951@gate.crashing.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: R-ovGPDOB3hZrPKzr9ukWU1s4jbEvIjy X-Proofpoint-GUID: upK6AaXlf8Mfj68NNNLVvF22p65upgHU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-18_13,2022-12-15_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 mlxscore=0 mlxlogscore=999 bulkscore=0 suspectscore=0 malwarescore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2212190053 X-Spam-Status: No, score=-5.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,KAM_SHORT,NICE_REPLY_A,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi Segher, Thanks for the review comments! on 2022/12/15 06:29, Segher Boessenkool wrote: > On Wed, Nov 30, 2022 at 04:30:13PM +0800, Kewen.Lin wrote: >> As PR104024 shows, the option -mpower10-fusion isn't guarded by >> -mcpu=power10, it causes compiler to fuse for some patterns >> even without power10 support and then causes ICE unexpectedly, >> this patch is to simply unmask it without power10 support, not >> emit any warnings as this option is undocumented. > > Yes, it mostly exists for debugging purposes (and also for testcase). > >> Besides, for some define_insns in fusion.md which use constraint >> v, it requires the condition VECTOR_UNIT_ALTIVEC_OR_VSX_P >> (mode), otherwise it can cause ICE in reload, see test >> case pr104024-2.c. > > Please don't two separate things in one patch. It makes bisecting > harder than necessary, and perhaps more interesting to you: it makes > writing good changelog entries and commit messages harder. OK, will do. > >> --- a/gcc/config/rs6000/genfusion.pl >> +++ b/gcc/config/rs6000/genfusion.pl >> @@ -167,7 +167,7 @@ sub gen_logical_addsubf >> $inner_comp, $inner_inv, $inner_rtl, $inner_op, $both_commute, $c4, >> $bc, $inner_arg0, $inner_arg1, $inner_exp, $outer_arg2, $outer_exp, >> $ftype, $insn, $is_subf, $is_rsubf, $outer_32, $outer_42,$outer_name, >> - $fuse_type); >> + $fuse_type, $constraint_cond); >> KIND: foreach $kind ('scalar','vector') { >> @outer_ops = @logicals; >> if ( $kind eq 'vector' ) { >> @@ -176,12 +176,14 @@ sub gen_logical_addsubf >> $pred = "altivec_register_operand"; >> $constraint = "v"; >> $fuse_type = "fused_vector"; >> + $constraint_cond = "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode) && "; >> } else { >> $vchr = ""; >> $mode = "GPR"; >> $pred = "gpc_reg_operand"; >> $constraint = "r"; >> $fuse_type = "fused_arith_logical"; >> + $constraint_cond = ""; >> push (@outer_ops, @addsub); >> push (@outer_ops, ( "rsubf" )); >> } > > I don't like this at all. Please use the "isa" attribute where needed? > Or do you need more in some cases? But, again, separate patch. This is to add one more condition for those define_insns, for example: @@ -1875,7 +1875,7 @@ (define_insn "*fuse_vand_vand" (match_operand:VM 1 "altivec_register_operand" "%v,v,v,v")) (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))) (clobber (match_scratch:VM 4 "=X,X,X,&v"))] - "(TARGET_P10_FUSION)" + "(VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode) && TARGET_P10_FUSION)" "@ vand %3,%1,%0\;vand %3,%3,%2 vand %3,%1,%0\;vand %3,%3,%2 It's to avoid the pseudo whose mode isn't available for register constraint v causes ICE during reload. I'm not sure how the "isa" attribute helps here, could you elaborate it? > >> + if (TARGET_POWER10 >> + && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION) == 0) >> + rs6000_isa_flags |= OPTION_MASK_P10_FUSION; >> + else if (!TARGET_POWER10 && TARGET_P10_FUSION) >> + rs6000_isa_flags &= ~OPTION_MASK_P10_FUSION; > > That's not right. If you want something like this you should check for > TARGET_POWER10 whenever you check for TARGET_P10_FUSION; but there > really is no reason at all to disable P10 fusion on other CPUs (neither > newer nor older!). Good point, and I just noticed that we should check tune setting instead of TARGET_POWER10 here? Something like: if (!(rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION)) { if (processor_target_table[tune_index].processor == PROCESSOR_POWER10) rs6000_isa_flags |= OPTION_MASK_P10_FUSION; else rs6000_isa_flags &= ~OPTION_MASK_P10_FUSION; } > >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/powerpc/pr104024-1.c >> @@ -0,0 +1,16 @@ >> +/* { dg-require-effective-target int128 } */ >> +/* { dg-options "-O1 -mdejagnu-cpu=power6 -mpower10-fusion" } */ > > Does this need -O1? If not, use -O2 please; if so, document it. > No, it doesn't, will use -O2 instead. BR, Kewen