From: Jeff Law <jeffreyalaw@gmail.com>
To: pan2.li@intel.com, gcc-patches@gcc.gnu.org
Cc: juzhe.zhong@rivai.ai, yanzhang.wang@intel.com, kito.cheng@gmail.com
Subject: Re: [PATCH v1] RISC-V: Remove unnecessary asm check for vec cvt
Date: Fri, 27 Oct 2023 13:49:25 -0600 [thread overview]
Message-ID: <bd04ec25-34a4-4a57-90fb-04ccb7ce40a0@gmail.com> (raw)
In-Reply-To: <20231023095457.3675888-1-pan2.li@intel.com>
On 10/23/23 03:54, pan2.li@intel.com wrote:
> From: Pan Li <pan2.li@intel.com>
>
> The vsetvl asm check is unnecessary for the vector convert. We
> should be focus for constrait and leave the vsetvl test to the
> vsetvl pass.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/autovec/unop/cvt-0.c: Remove the vsetvl
> asm check from func body.
> * gcc.target/riscv/rvv/autovec/unop/cvt-1.c: Ditto.
OK
jeff
prev parent reply other threads:[~2023-10-27 19:49 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-23 9:54 pan2.li
2023-10-23 9:57 ` juzhe.zhong
2023-10-23 9:58 ` Li, Pan2
2023-10-27 19:49 ` Jeff Law [this message]
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