From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pl1-x629.google.com (mail-pl1-x629.google.com [IPv6:2607:f8b0:4864:20::629]) by sourceware.org (Postfix) with ESMTPS id 826A03858D20 for ; Sat, 18 May 2024 01:57:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 826A03858D20 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 826A03858D20 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::629 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1715997451; cv=none; b=lBSa6NrkWQLUcKbyLPiVAH6iElN80c0IRKsZh/F0cvEQ8hq38VIu1i1ivPN+CjhK5F0AWcLulkKF74bAosBorEVU77qtj25Mhhxm0V/Ji8WCuQGnYFiq0lEY2UmHuntR1U0hctPY15HIoWY9Q79yvPC1LoCf3V7g/0SVaxcethQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1715997451; c=relaxed/simple; bh=JDjeE9yNl272qkI6E8sQaHXC9CWMQSv/6V77lwe10Uw=; h=DKIM-Signature:Message-ID:Date:MIME-Version:Subject:To:From; b=hS9JIBVySmjVcoHRPLuCFWr73mraVJ6ab/jxpoxnyxp2DIWiBhqpcOowCFGdPLYnh730Cb87GaeluNKyMHUHPP/+jNY34yJISNgsjOd2a3jiY1aVWj/I2K8RS14NC3AtsDAqXA3VJMzaLhoTqighv2e9zLeTDOuu/x0TwS/1k/I= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-1f05b669b6cso25833925ad.3 for ; Fri, 17 May 2024 18:57:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1715997446; x=1716602246; darn=gcc.gnu.org; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=AB6FUYcK8rAuyJ3BsH/u2J51/lMiPRrMGCT5lvZYe9g=; b=NBaku/y2KAIWNvEQuR9eZ1BpGWENXSmkMA+Vs1Qfw1rQ9jfpQwaAbrKaUnL73QRoCH 89zoRGyOGUPSKpvQEphr6diFDbx3AwfjgXzjkcx6aIHziGnTOiCVsDNni65Ma+ZEyb/D vgY9uuAqiyF18fDLZNp+BZzkpKWfbwwNiD3UzaRXTz+wNOQLndrn5Nic71gXeQeA9yQ1 yI2sUZ3TngZwW3s6xXj14PEw68sTieBql+uLyuvTsv8nzIG9P6YS3R6yG7wh3L4SQvbZ nki2r/KgWsfz8sYPmjd8K9u75taXyNlYnWqddv6Du7071n2KSvkJyvg7y55vqZ5d5qOS LjeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715997446; x=1716602246; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=AB6FUYcK8rAuyJ3BsH/u2J51/lMiPRrMGCT5lvZYe9g=; b=etVyxY5ZE3k/kcNnbTetu053WeqnVvbRreMh0t6dw7JcRP6mpYV8FmTBkLw/kM0m8x AvL5Hpnk+O0+Wi56M3sHkAg9reITjVDOuut8hRP4eUEAUvZo7UkDOmqzOvAU1jxEMtxx 2LXxgW++JLA0Atk+MAITOgC9KplW/SaaYs9IHitvmIZLCLCpuyKr6VWaJeMsdL6sMiDN co937FAxX6G5cQtfZpSaWgMniRIJJvDE3Oq4wjUH36YLMICrgLvL1M4lKfoleL7c0M5m u+Rr0lHY6OQpUIzwbuBVsQ1NypuIsA0QLCU0y5VYzUiwGT8gp6jw7JzYZNq7bTA15vb/ YdVA== X-Forwarded-Encrypted: i=1; AJvYcCW6RDfZSLcKNTQMd4NWgLEIdRlaG450yeHQ3qsxfrjedtbD4t6dpbXsVQq959kCQDb27Sc+UwQxssF23JNFojGk4za9B4YvRA== X-Gm-Message-State: AOJu0Yw1N07cIBUNGcq7Q78S81ghwPCfO4Lcid6nk3Whjmsa3n/WC2F+ 2Y/5WjXv1x6P78f0CjLD3Sc/9+cYQDLcsBQkx/V1kUs+JfYV+SYH X-Google-Smtp-Source: AGHT+IFBCebY2rzUjjw4dkwVLyMaLdwBtW8V6oXJCxx8ZIsRyuozw+YmXICIVlzdcy663SJpiliVcw== X-Received: by 2002:a05:6a00:10d2:b0:6f3:89d3:cb1c with SMTP id d2e1a72fcca58-6f4e02ce8f4mr26039425b3a.16.1715997446124; Fri, 17 May 2024 18:57:26 -0700 (PDT) Received: from [172.31.0.109] ([136.36.72.243]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-6f4d2ae0d77sm15424726b3a.106.2024.05.17.18.57.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 17 May 2024 18:57:25 -0700 (PDT) Message-ID: Date: Fri, 17 May 2024 19:57:24 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Beta Subject: Re: [PATCH] RISC-V: Fix "Nan-box the result of movbf on soft-bf16" Content-Language: en-US To: Xiao Zeng , gcc-patches@gcc.gnu.org Cc: research_trasio@irq.a4lg.com, kito.cheng@gmail.com, palmer@dabbelt.com, zhengyu@eswincomputing.com References: <20240516015504.38411-1-zengxiao@eswincomputing.com> From: Jeff Law In-Reply-To: <20240516015504.38411-1-zengxiao@eswincomputing.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-8.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 5/15/24 7:55 PM, Xiao Zeng wrote: > 1 According to unpriv-isa spec: > > 1.1 "FMV.H.X moves the half-precision value encoded in IEEE 754-2008 > standard encoding from the lower 16 bits of integer register rs1 > to the floating-point register rd, NaN-boxing the result." > 1.2 "FMV.W.X moves the single-precision value encoded in IEEE 754-2008 > standard encoding from the lower 32 bits of integer register rs1 > to the floating-point register rd. The bits are not modified in the > transfer, and in particular, the payloads of non-canonical NaNs are preserved." > > 2 When (!TARGET_ZFHMIN == true && TARGET_HARD_FLOAT == true), instruction needs > to be added to complete the Nan-box, as done in > "RISC-V: Nan-box the result of movhf on soft-fp16": > > > 3 Consider the "RISC-V: Nan-box the result of movbf on soft-bf16" in: > > It ignores that both hf16 and bf16 are 16bits floating-point. > > 4 zfbfmin -> zfhmin in: > > > gcc/ChangeLog: > > * config/riscv/riscv.cc (riscv_legitimize_move): Optimize movbf > with Nan-boxing value. > * config/riscv/riscv.md (*movhf_softfloat_boxing): Expand movbf > with Nan-boxing value. > (*mov_softfloat_boxing): Ditto. > with Nan-boxing value. > (*movbf_softfloat_boxing): Delete abandon pattern. > --- > gcc/config/riscv/riscv.cc | 15 +++++---------- > gcc/config/riscv/riscv.md | 19 +++++-------------- > 2 files changed, 10 insertions(+), 24 deletions(-) > > diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc > index 4067505270e..04513537aad 100644 > --- a/gcc/config/riscv/riscv.cc > +++ b/gcc/config/riscv/riscv.cc > @@ -3178,13 +3178,10 @@ riscv_legitimize_move (machine_mode mode, rtx dest, rtx src) > (set (reg:SI/DI mask) (const_int -65536) > (set (reg:SI/DI temp) (zero_extend:SI/DI (subreg:HI (reg:HF/BF src) 0))) > (set (reg:SI/DI temp) (ior:SI/DI (reg:SI/DI mask) (reg:SI/DI temp))) > - (set (reg:HF/BF dest) (unspec:HF/BF[ (reg:SI/DI temp) ] > - UNSPEC_FMV_SFP16_X/UNSPEC_FMV_SBF16_X)) > - */ > + (set (reg:HF/BF dest) (unspec:HF/BF[ (reg:SI/DI temp) ] UNSPEC_FMV_FP16_X)) > + */ > > - if (TARGET_HARD_FLOAT > - && ((!TARGET_ZFHMIN && mode == HFmode) > - || (!TARGET_ZFBFMIN && mode == BFmode)) > + if (TARGET_HARD_FLOAT && !TARGET_ZFHMIN && (mode == HFmode || mode == BFmode) We generally prefer not to mix && and || operators on the same line. I'd suggest if (TARGET_HARD_FLOAT && !TARGET_ZFHMIN && (mode == HFmode || mode == BFmode) [ ... ] > @@ -1959,23 +1958,15 @@ > (set_attr "type" "fmove,move,load,store,mtc,mfc") > (set_attr "mode" "")]) > > -(define_insn "*movhf_softfloat_boxing" > - [(set (match_operand:HF 0 "register_operand" "=f") > - (unspec:HF [(match_operand:X 1 "register_operand" " r")] UNSPEC_FMV_SFP16_X))] > +(define_insn "*mov_softfloat_boxing" > + [(set (match_operand:HFBF 0 "register_operand" "=f") > + (unspec:HFBF [(match_operand:X 1 "register_operand" " r")] > + UNSPEC_FMV_FP16_X))] > "!TARGET_ZFHMIN" I think the linter complained about having 8 spaces instead of a tab in one of the lines above. With those fixes, this is fine for the trunk. jeff