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To: Xi Ruoyao , gcc-patches@gcc.gnu.org Cc: i@xen0n.name, xuchenghua@loongson.cn References: <20240126073745.13252-1-chenglulu@loongson.cn> <8031fd77ea3209ccac6c085ac5692f92f4291534.camel@xry111.site> <4f79de603056628da59234b89ed3878b0472087e.camel@xry111.site> <3db91947279b4a62cf9fd0393c319ce758aa04f0.camel@xry111.site> From: chenglulu Message-ID: Date: Sat, 27 Jan 2024 22:03:15 +0800 User-Agent: Mozilla/5.0 (X11; Linux loongarch64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <3db91947279b4a62cf9fd0393c319ce758aa04f0.camel@xry111.site> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-CM-TRANSID:AQAAf8BxLs8iDbVltkQfAA--.64150S3 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoW3Xw4xGF4DZr1xWryxGF1kXrc_yoW7ZFW7pr s7C3WjkFW8JFn3Kw1Dtw1UGryjqr17K342qFn8JFy8CrsrJryYgFWFgrnI9FyUGw48XrWx XF1ru3W7ZF15XacCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUvFb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r106r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6r4UJVWxJr1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27w Aqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE 14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvEwIxGrwCYjI0SjxkI62AI1c AE67vIY487MxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8C rVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtw CIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x02 67AKxVWUJVW8JwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr 0_Gr1lIxAIcVC2z280aVCY1x0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjxU25Ef UUUUU X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00,BODY_8BITS,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,KAM_STOCKGEN,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: 在 2024/1/27 下午7:11, Xi Ruoyao 写道: > On Sat, 2024-01-27 at 18:02 +0800, Xi Ruoyao wrote: >> On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote: >>> 在 2024/1/26 下午6:57, Xi Ruoyao 写道: >>>> On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote: >>>>> 在 2024/1/26 下午4:49, Xi Ruoyao 写道: >>>>>> On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote: >>>>>>> v3 -> v4: >>>>>>>     1. Add macro support for TLS symbols >>>>>>>     2. Added support for loading __get_tls_addr symbol address using call36. >>>>>>>     3. Merge template got_load_tls_{ld/gd/le/ie}. >>>>>>>     4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto. >>>>>> I've rebased and attached the patch to fix the bad split in -mexplicit- >>>>>> relocs={always,auto} -mcmodel=extreme on top of this series.  I've not >>>>>> tested it seriously though (only tested the added and modified test >>>>>> cases). >>>>>> >>>>> OK, I'll test the spec for correctness. >>>> I suppose this still won't work yet because Binutils is not fully fixed. >>>> GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0, >>>> foo", but ld is still not checking if an R_LARCH_RELAX is after >>>> R_LARCH_TLS_IE_PC_{HI20,LO12} properly.  Thus an invalid "partial" TLS >>>> transition can still happen. >>>> >>> The following situations are not handled in the patch: >>> >>> diff --git a/gcc/config/loongarch/loongarch.cc >>> b/gcc/config/loongarch/loongarch.cc >>> >>> index 3fab4b64453..6336a9f696f 100644 >>> --- a/gcc/config/loongarch/loongarch.cc >>> +++ b/gcc/config/loongarch/loongarch.cc >>> @@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree >>> thunk_fndecl ATTRIBUTE_UNUSED, >>>       { >>>         if (TARGET_CMODEL_EXTREME) >>>          { >>> -         emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); >>> +         if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE) >>> +           { >>> +             emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr)); >>> +             emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2)); >>> +           } >>> +         else >>> +           emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); > It looks like this part is unreachable: with -mcmodel=extreme > use_sibcall_p will never be true. > > So cleaned up this part and fixed an ERROR in the added test: > > diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc > index 3a97ba61362..7b8c85a1606 100644 > --- a/gcc/config/loongarch/loongarch.cc > +++ b/gcc/config/loongarch/loongarch.cc > @@ -7481,21 +7481,24 @@ loongarch_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, > allowed, otherwise load the address into a register first. */ > if (use_sibcall_p) > { > - if (TARGET_CMODEL_EXTREME) > - { > - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); > - insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx)); > - } > - else > - insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx)); > + /* If TARGET_CMODEL_EXTREME, we cannot do a direct jump at all > + and const_call_insn_operand should have returned false. */ > + gcc_assert (!TARGET_CMODEL_EXTREME); > + > + insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx)); > SIBLING_CALL_P (insn) = 1; > } > else > { > - if (TARGET_CMODEL_EXTREME) > + if (!TARGET_CMODEL_EXTREME) > + loongarch_emit_move (temp1, fnaddr); > + else if (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE) > emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); > else > - loongarch_emit_move (temp1, fnaddr); > + { > + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr)); > + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2)); > + } > > emit_jump_insn (gen_indirect_jump (temp1)); > } > diff --git a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c > index 27baf4886d6..35bd4570a9e 100644 > --- a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c > +++ b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c > @@ -1,5 +1,5 @@ > /* { dg-do compile } */ > /* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mcmodel=extreme -fno-plt" } */ > -/* { dg-final { scan-assembler-not "la.tls.[lg]d" { target tls_native } } } */ > +/* { dg-final { scan-assembler-not "la.tls.\[lg\]d" { target tls_native } } } */ > > #include "./explicit-relocs-auto-tls-ld-gd.c" > > And added 3 tests for output_mi_thunk. The updated patch attached, now > running regression test. > @@ -2870,20 +2872,30 @@ loongarch_call_tls_get_addr (rtx sym, enum loongarch_symbol_type type, rtx v0)             {               if (loongarch_explicit_relocs_p (SYMBOL_GOT_DISP))                 { -                 rtx tmp1 = gen_reg_rtx (Pmode); -                 rtx high = gen_reg_rtx (Pmode); +                 gcc_assert (la_opt_explicit_relocs != + EXPLICIT_RELOCS_NONE); This operator is written at the end of the line, and I think there is no problem with anything else. But I need to see the results on Monday for the test.