From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 52852 invoked by alias); 29 Aug 2019 15:37:44 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 52837 invoked by uid 89); 29 Aug 2019 15:37:44 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.4 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: mx07-00178001.pphosted.com Received: from mx08-00178001.pphosted.com (HELO mx07-00178001.pphosted.com) (91.207.212.93) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 29 Aug 2019 15:37:42 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x7TFaPeq016903 for ; Thu, 29 Aug 2019 17:37:40 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=subject : to : references : from : message-id : date : mime-version : in-reply-to : content-type; s=STMicroelectronics; bh=84nCYb+uGQ87QnF4MAgubeE201Z0oR6A38yMNXQT1oA=; b=Y8jZy0d31YWHUeaunXlRLeg5F8qE6dDKridNOIivTP6kI0Ii0V3XfIdnaf/D4sZo2WVy MO8ugmRERcSRkvvvVvo6WXZhuA3rr5zXiCOwLh1BXp7Ro+pF89Y7ClauOWO2ngfTvsuu Fwu7m8OGdz65CQiZN6zb5OQKL2WwmDHL/KMrh3wlTn9SYzeEzW6sksjlVU2d2g60ds1N jsWK+YJpfL9QwHKjJT/MQU6b6zioRFEbaaYSXt+LIen5JkSnsjkd9KVdysEbNtrvW1Pr oA85uOVU8XofdyJlgNXMJnFKrvfFsrkZGXL8Qq30e8Gj20OgBzEeeHYRon9l+Hi5Ha9c cg== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx08-00178001.pphosted.com with ESMTP id 2upe699554-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT) for ; Thu, 29 Aug 2019 17:37:40 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 6E7AC23 for ; Thu, 29 Aug 2019 15:37:37 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D32852FF5CD for ; Thu, 29 Aug 2019 17:37:36 +0200 (CEST) Received: from [10.129.178.138] (10.75.127.48) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 29 Aug 2019 17:37:36 +0200 Subject: Re: [ARM/FDPIC v5 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp To: References: <20190515124006.25840-1-christophe.lyon@st.com> <20190515124006.25840-13-christophe.lyon@st.com> From: Christophe Lyon Message-ID: Date: Thu, 29 Aug 2019 15:40:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20190515124006.25840-13-christophe.lyon@st.com> Content-Type: multipart/mixed; boundary="------------F48F2F0536F8D1F1071ACBD0" X-IsSubscribed: yes X-SW-Source: 2019-08/txt/msg01999.txt.bz2 --------------F48F2F0536F8D1F1071ACBD0 Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 8bit Content-length: 2749 Here is an updated version that makes use of the helper gen_restore_pic_register_after_call Christophe On 15/05/2019 14:39, Christophe Lyon wrote: > We call __aeabi_read_tp() to get the thread pointer. Since this is a > function call, we have to restore the FDPIC register afterwards. > > 2019-XX-XX Christophe Lyon > Mickaël Guêné > > gcc/ > * config/arm/arm.c (arm_load_tp): Add FDPIC support. > * config/arm/arm.md (load_tp_soft_fdpic): New pattern. > (load_tp_soft): Disable in FDPIC mode. > > Change-Id: I1f6dfaee6260ecb453270f4971b3c5124317a186 > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > index 5fc7a20..26f29c7 100644 > --- a/gcc/config/arm/arm.c > +++ b/gcc/config/arm/arm.c > @@ -8732,7 +8732,25 @@ arm_load_tp (rtx target) > > rtx tmp; > > - emit_insn (gen_load_tp_soft ()); > + if (TARGET_FDPIC) > + { > + rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (3)); > + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); > + rtx initial_fdpic_reg = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM); > + > + emit_insn (gen_load_tp_soft_fdpic ()); > + > + /* Restore r9. */ > + XVECEXP (par, 0, 0) = gen_rtx_UNSPEC (VOIDmode, > + gen_rtvec (2, fdpic_reg, > + initial_fdpic_reg), > + UNSPEC_PIC_RESTORE); > + XVECEXP (par, 0, 1) = gen_rtx_USE (VOIDmode, initial_fdpic_reg); > + XVECEXP (par, 0, 2) = gen_rtx_CLOBBER (VOIDmode, fdpic_reg); > + emit_insn (par); > + } > + else > + emit_insn (gen_load_tp_soft ()); > > tmp = gen_rtx_REG (SImode, R0_REGNUM); > emit_move_insn (target, tmp); > diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md > index 9036255..0edcb1d 100644 > --- a/gcc/config/arm/arm.md > +++ b/gcc/config/arm/arm.md > @@ -11759,12 +11759,25 @@ > ) > > ;; Doesn't clobber R1-R3. Must use r0 for the first operand. > +(define_insn "load_tp_soft_fdpic" > + [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS)) > + (clobber (reg:SI 9)) > + (clobber (reg:SI LR_REGNUM)) > + (clobber (reg:SI IP_REGNUM)) > + (clobber (reg:CC CC_REGNUM))] > + "TARGET_SOFT_TP && TARGET_FDPIC" > + "bl\\t__aeabi_read_tp\\t@ load_tp_soft" > + [(set_attr "conds" "clob") > + (set_attr "type" "branch")] > +) > + > +;; Doesn't clobber R1-R3. Must use r0 for the first operand. > (define_insn "load_tp_soft" > [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS)) > (clobber (reg:SI LR_REGNUM)) > (clobber (reg:SI IP_REGNUM)) > (clobber (reg:CC CC_REGNUM))] > - "TARGET_SOFT_TP" > + "TARGET_SOFT_TP && !TARGET_FDPIC" > "bl\\t__aeabi_read_tp\\t@ load_tp_soft" > [(set_attr "conds" "clob") > (set_attr "type" "branch")] --------------F48F2F0536F8D1F1071ACBD0 Content-Type: text/x-patch; name="0012-ARM-FDPIC-Restore-r9-after-we-call-__aeabi_read_tp.patch" Content-Transfer-Encoding: 8bit Content-Disposition: attachment; filename*0="0012-ARM-FDPIC-Restore-r9-after-we-call-__aeabi_read_tp.patc"; filename*1="h" Content-length: 2506 >From b27af6ffc5423679167b5862764d259598b3bf29 Mon Sep 17 00:00:00 2001 From: Christophe Lyon Date: Thu, 8 Feb 2018 14:51:07 +0100 Subject: [ARM/FDPIC v6 12/24] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We call __aeabi_read_tp() to get the thread pointer. Since this is a function call, we have to restore the FDPIC register afterwards. 2019-XX-XX Christophe Lyon Mickaël Guêné gcc/ * config/arm/arm.c (arm_load_tp): Add FDPIC support. * config/arm/arm.md (load_tp_soft_fdpic): New pattern. (load_tp_soft): Disable in FDPIC mode. Change-Id: I0811cc7c5df8f44dd8b8b1f4caf54c7d3609c414 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 43fe467..9501e8d 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -8729,7 +8729,18 @@ arm_load_tp (rtx target) rtx tmp; - emit_insn (gen_load_tp_soft ()); + if (TARGET_FDPIC) + { + rtx fdpic_reg = gen_rtx_REG (Pmode, FDPIC_REGNUM); + rtx initial_fdpic_reg = get_hard_reg_initial_val (Pmode, FDPIC_REGNUM); + + emit_insn (gen_load_tp_soft_fdpic ()); + + /* Restore r9. */ + emit_insn (gen_restore_pic_register_after_call(fdpic_reg, initial_fdpic_reg)); + } + else + emit_insn (gen_load_tp_soft ()); tmp = gen_rtx_REG (SImode, R0_REGNUM); emit_move_insn (target, tmp); diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 328d32d..ea015ed 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -11700,12 +11700,25 @@ ) ;; Doesn't clobber R1-R3. Must use r0 for the first operand. +(define_insn "load_tp_soft_fdpic" + [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS)) + (clobber (reg:SI 9)) + (clobber (reg:SI LR_REGNUM)) + (clobber (reg:SI IP_REGNUM)) + (clobber (reg:CC CC_REGNUM))] + "TARGET_SOFT_TP && TARGET_FDPIC" + "bl\\t__aeabi_read_tp\\t@ load_tp_soft" + [(set_attr "conds" "clob") + (set_attr "type" "branch")] +) + +;; Doesn't clobber R1-R3. Must use r0 for the first operand. (define_insn "load_tp_soft" [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS)) (clobber (reg:SI LR_REGNUM)) (clobber (reg:SI IP_REGNUM)) (clobber (reg:CC CC_REGNUM))] - "TARGET_SOFT_TP" + "TARGET_SOFT_TP && !TARGET_FDPIC" "bl\\t__aeabi_read_tp\\t@ load_tp_soft" [(set_attr "conds" "clob") (set_attr "type" "branch")] -- 2.6.3 --------------F48F2F0536F8D1F1071ACBD0--