From: Jeff Law <law@redhat.com>
To: Jozef Lawrynowicz <jozef.l@mittosystems.com>, gcc-patches@gcc.gnu.org
Cc: "nickc@redhat.com" <nickc@redhat.com>
Subject: Re: [PATCH][MSP430][2/4] Emulate 16-bit shifts with rotate insn when src operand is originally in memory
Date: Wed, 05 Jun 2019 22:21:00 -0000 [thread overview]
Message-ID: <c18ad75a-3313-cd13-a6c9-cd715554c70c@redhat.com> (raw)
In-Reply-To: <20190604141138.061f7e8f@jozef-kubuntu>
On 6/4/19 7:11 AM, Jozef Lawrynowicz wrote:
> This patch reduces code size by enabling the emulation of some 16-bit shift
> instructions with the native rotate instructions, when the source operand is in
> memory. This is achieved by forcing the source operand into a register.
>
> For the following program, the below code size reduction is observed:
> int a;
>
> int
> main (void)
> {
> a = a << 4;
> return 0;
> }
>
> With shift patch 1:
> text data bss dec hex filename
> 484 12 20 516 204 a.out
> With new patch:
> text data bss dec hex filename
> 452 12 20 484 1e4 a.out
>
> Ok for trunk?
>
>
> 0002-MSP430-Force-the-src-operand-of-a-HImode-shift-into-.patch
>
> From e609f63d49227ce385316896dde6a476f5f27db7 Mon Sep 17 00:00:00 2001
> From: Jozef Lawrynowicz <jozef.l@mittosystems.com>
> Date: Mon, 13 May 2019 17:48:00 +0100
> Subject: [PATCH 2/4] MSP430: Force the src operand of a HImode shift into a
> register if it is in memory
>
> gcc/ChangeLog
>
> 2019-06-04 Jozef Lawrynowicz <jozef.l@mittosystems.com>
>
> * config/msp430/msp430.md (ashlhi3): Force shift src operand into a
> register if it is in memory, so the shift can be emulated with a rotate
> instruction.
> (ashrhi3): Likewise.
> (lshrhi3): Likewise.
>
> gcc/testsuite/ChangeLog
>
> 2019-06-04 Jozef Lawrynowicz <jozef.l@mittosystems.com>
>
> * gcc.target/msp430/emulate-slli.c: New test.
> * gcc.target/msp430/emulate-srai.c: New test.
> * gcc.target/msp430/emulate-srli.c: New test.
OK
jeff
> ---
next prev parent reply other threads:[~2019-06-05 22:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-04 13:03 [PATCH][MSP430][0/4] Reduce code size when performing bit shifts Jozef Lawrynowicz
2019-06-04 13:07 ` [PATCH][MSP430][1/4] Put libgcc shift functions in their own sections Jozef Lawrynowicz
2019-06-05 22:20 ` Jeff Law
2019-06-04 13:11 ` [PATCH][MSP430][2/4] Emulate 16-bit shifts with rotate insn when src operand is originally in memory Jozef Lawrynowicz
2019-06-05 22:21 ` Jeff Law [this message]
2019-06-04 13:14 ` [PATCH][MSP430][3/4] Disable performance optimal library code shifts when optimizing for size Jozef Lawrynowicz
2019-06-05 22:22 ` Jeff Law
2019-06-04 13:17 ` [PATCH][MSP430][4/4] Implement 64-bit shifts in assembly code Jozef Lawrynowicz
2019-06-05 22:35 ` Jeff Law
2019-06-06 12:42 ` Jozef Lawrynowicz
2019-06-06 17:33 ` Jeff Law
2019-06-16 21:42 ` Jozef Lawrynowicz
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