On 11/1/22 11:25, Kevin Lee wrote:
> This is the updated patch of
> https://gcc.gnu.org/pipermail/gcc-patches/2022-September/601824.html. Since
> the riscv-selftest.cc has been added, this version of the patch adds the
> logic in riscv-selftest.cc to also consider parallel insns.
>    The patch has been tested with rv64imafdc / rv64imac / rv32imafdc /
> rv32imac and no additional failures were detected in the testsuite.
>
> gcc/ChangeLog:
> Jim Wilson<jim.wilson.gcc@gmail.com>
> Michael Collison<collison@rivosinc.com>
> Kevin Lee<kevinl@rivosinc.com>
> * config/riscv/predicates.md (const_lui_operand): New Predicate.
> (add_operand): Ditto.
> (reg_or_const_int_operand): Ditto.
> * config/riscv/riscv-protos.h (riscv_eliminable_reg): New
> function.
> * config/riscv/riscv-selftests.cc (calculate_x_in_sequence):
> Consider Parallel insns.
> * config/riscv/riscv.cc (riscv_eliminable_reg): New function.
> (riscv_adjust_libcall_cfi_prologue): Use gen_rtx_SET and
> gen_rtx_fmt_ee instead of gen_add3_insn.
> (riscv_adjust_libcall_cfi_epilogue): Ditto.
> * config/riscv/riscv.md (addsi3): Remove.
> (add<mode>3): New instruction for large stack frame
> optimization.
> (add<mode>3_internal): Ditto.
> (adddi3): Remove.
> (add<mode>3_internal2): New instruction for insns generated in
> the prologue and epilogue pass.

It looks like your mailer completely messed up the formatting of the 
patch.  Please resend it as a plaintext attachment.  It's basically 
unreadable as-is.


I went back and looked at the original thread, for the saxpy example, 
the patch made a notable improvement in the setup code, but actually 
lengthened the loop by one instruction, though it has eliminated two 
memory loads in the loop, replacing them with arithmetic, which is 
probably a win.

The loop still seems a bit odd which may point to further improvements 
that could be made to this patch.  Consider this fragment of the loop:

	addi a3,sp,-864
	sh2add a3,a5,a3
	flw fa5,864(a3)

Note the +-864.  Don't those just cancel out?


Jeff