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([2601:681:8600:13d0::f0a]) by smtp.gmail.com with ESMTPSA id l6-20020a622506000000b0056c08c87196sm7045817pfl.48.2022.11.01.16.03.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 01 Nov 2022 16:03:35 -0700 (PDT) Content-Type: multipart/alternative; boundary="------------9lMRBXvzOhLqtJUuqtFI8C0P" Message-ID: Date: Tue, 1 Nov 2022 17:03:34 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.1 Subject: Re: [PATCH v2] RISC-V modified add3 for large stack frame optimization [PR105733] Content-Language: en-US To: Kevin Lee , gcc-patches@gcc.gnu.org Cc: gnu-toolchain@rivosinc.com References: From: Jeff Law In-Reply-To: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,HTML_MESSAGE,KAM_SHORT,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This is a multi-part message in MIME format. --------------9lMRBXvzOhLqtJUuqtFI8C0P Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 11/1/22 11:25, Kevin Lee wrote: > This is the updated patch of > https://gcc.gnu.org/pipermail/gcc-patches/2022-September/601824.html. Since > the riscv-selftest.cc has been added, this version of the patch adds the > logic in riscv-selftest.cc to also consider parallel insns. > The patch has been tested with rv64imafdc / rv64imac / rv32imafdc / > rv32imac and no additional failures were detected in the testsuite. > > gcc/ChangeLog: > Jim Wilson > Michael Collison > Kevin Lee > * config/riscv/predicates.md (const_lui_operand): New Predicate. > (add_operand): Ditto. > (reg_or_const_int_operand): Ditto. > * config/riscv/riscv-protos.h (riscv_eliminable_reg): New > function. > * config/riscv/riscv-selftests.cc (calculate_x_in_sequence): > Consider Parallel insns. > * config/riscv/riscv.cc (riscv_eliminable_reg): New function. > (riscv_adjust_libcall_cfi_prologue): Use gen_rtx_SET and > gen_rtx_fmt_ee instead of gen_add3_insn. > (riscv_adjust_libcall_cfi_epilogue): Ditto. > * config/riscv/riscv.md (addsi3): Remove. > (add3): New instruction for large stack frame > optimization. > (add3_internal): Ditto. > (adddi3): Remove. > (add3_internal2): New instruction for insns generated in > the prologue and epilogue pass. It looks like your mailer completely messed up the formatting of the patch.  Please resend it as a plaintext attachment.  It's basically unreadable as-is. I went back and looked at the original thread, for the saxpy example, the patch made a notable improvement in the setup code, but actually lengthened the loop by one instruction, though it has eliminated two memory loads in the loop, replacing them with arithmetic, which is probably a win. The loop still seems a bit odd which may point to further improvements that could be made to this patch.  Consider this fragment of the loop: addi a3,sp,-864 sh2add a3,a5,a3 flw fa5,864(a3) Note the +-864.  Don't those just cancel out? Jeff --------------9lMRBXvzOhLqtJUuqtFI8C0P--