From: Jeff Law <jeffreyalaw@gmail.com>
To: Ajit Agarwal <aagarwa1@linux.ibm.com>,
gcc-patches <gcc-patches@gcc.gnu.org>
Cc: Segher Boessenkool <segher@kernel.crashing.org>,
Peter Bergner <bergner@linux.ibm.com>,
Jakub Jelinek <jakub@redhat.com>,
Richard Biener <richard.guenther@gmail.com>
Subject: Re: [PATCH v3 3/4] ree: Main functionality to Improve ree pass for rs6000 target
Date: Fri, 28 Apr 2023 16:10:51 -0600 [thread overview]
Message-ID: <c3039e15-efab-61f6-48db-b313de0782ab@gmail.com> (raw)
In-Reply-To: <760bf382-856c-e6cd-25ec-9a3086b1a344@linux.ibm.com>
On 4/20/23 15:03, Ajit Agarwal wrote:
>
> Currently I support AND with const1_rtx. This is what is equivalent to zero extension instruction in power instruction set. When you specify many other constants and Could you please specify what other constants needs to be supported and how to determine on the Input and output modes.
x AND <constant> will result in a zero-extended representation for a
variety of constants, not just 1. For example
For example x AND 3, x AND 7, x AND 15, etc.
If (const_int 1) is really that special here, then I've either
completely misunderstood the intention of your patch or there's
something quite special about the PPC port that I'm not aware of.
Jeff
next prev parent reply other threads:[~2023-04-28 22:10 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-19 18:00 Ajit Agarwal
2023-04-19 21:53 ` Jeff Law
2023-04-20 21:03 ` Ajit Agarwal
2023-04-20 21:18 ` Ajit Agarwal
2023-04-20 21:21 ` Ajit Agarwal
2023-04-28 22:10 ` Jeff Law [this message]
2023-05-12 11:18 ` Ajit Agarwal
2023-05-31 5:32 ` [PING] " Ajit Agarwal
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