[PATCH. rs6000] Fix PR84912: ICE using -m32 on __builtin_divde*, patch #1

[PATCH. rs6000] Fix PR84912: ICE using -m32 on __builtin_divde*, patch #1

[Peter Bergner]

This is the first patch to fix PR84912, which is an ICE when calling some
extended divide builtin functions.  In discussing this offline, we decided
that all div*o builtin functions make no sense because we don't model the
OV bit in GCC.  This patch simply removes all div*o builtins and their
associated documentation.  The next patch will cure the remaining ICEs.

This passed bootstrap and regtesting on powerpc64-linux with no regressions.
Ok for mainline?

Do we want this backported to the open release branches too?

Peter

gcc/
	PR target/84912
	* config/rs6000/rs6000-builtin.def (DIVWEO): Delete macro expansion.
	(DIVWEUO): Likewise.
	(DIVDEO): Likewise.
	(DIVDEUO): Likewise.
	* config/rs6000/rs6000.c (builtin_function_type): Remove support for
	DIVWEUO and DIVDEUO.
	* config/rs6000/rs6000.md (UNSPEC_DIVEO, UNSPEC_DIVEUO): Delete unspecs.
	(UNSPEC_DIV_EXTEND): Remove deleted unspecs.
	(div_extend): Likewise.
	* doc/extend.texi (__builtin_divweo): Remove documention for deleted
	builtin function.
	(__builtin_divweuo): Likewise.
	(__builtin_divdeo): Likewise.
	(__builtin_divdeuo): Likewise.

gcc/testsuite/
	PR target/84912
	* gcc.target/powerpc/extend-divide-1.c (div_weo): Remove test for
	deleted builtin function.
	(div_weuo): Likewise.
	* gcc.target/powerpc/extend-divide-2.c (div_deo): Likewise.
	(div_deuo): Likewise.

Index: gcc/config/rs6000/rs6000-builtin.def
===================================================================
--- gcc/config/rs6000/rs6000-builtin.def	(revision 258802)
+++ gcc/config/rs6000/rs6000-builtin.def	(working copy)
@@ -2310,13 +2310,9 @@ BU_P9V_OVERLOAD_1 (VCTZLSBB,	"vctzlsbb")
 \f
 /* 2 argument extended divide functions added in ISA 2.06.  */
 BU_P7_MISC_2 (DIVWE,		"divwe",	CONST,	dive_si)
-BU_P7_MISC_2 (DIVWEO,		"divweo",	CONST,	diveo_si)
 BU_P7_MISC_2 (DIVWEU,		"divweu",	CONST,	diveu_si)
-BU_P7_MISC_2 (DIVWEUO,		"divweuo",	CONST,	diveuo_si)
 BU_P7_MISC_2 (DIVDE,		"divde",	CONST,	dive_di)
-BU_P7_MISC_2 (DIVDEO,		"divdeo",	CONST,	diveo_di)
 BU_P7_MISC_2 (DIVDEU,		"divdeu",	CONST,	diveu_di)
-BU_P7_MISC_2 (DIVDEUO,		"divdeuo",	CONST,	diveuo_di)
 
 /* 1 argument DFP (decimal floating point) functions added in ISA 2.05.  */
 BU_DFP_MISC_1 (DXEX,		"dxex",		CONST,	dfp_dxex_dd)
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	(revision 258802)
+++ gcc/config/rs6000/rs6000.c	(working copy)
@@ -18053,9 +18053,7 @@ builtin_function_type (machine_mode mode
     case CRYPTO_BUILTIN_VPMSUM:
     case MISC_BUILTIN_ADDG6S:
     case MISC_BUILTIN_DIVWEU:
-    case MISC_BUILTIN_DIVWEUO:
     case MISC_BUILTIN_DIVDEU:
-    case MISC_BUILTIN_DIVDEUO:
     case VSX_BUILTIN_UDIV_V2DI:
     case ALTIVEC_BUILTIN_VMAXUB:
     case ALTIVEC_BUILTIN_VMINUB:
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md	(revision 258802)
+++ gcc/config/rs6000/rs6000.md	(working copy)
@@ -130,9 +130,7 @@ (define_c_enum "unspec"
    UNSPEC_CDTBCD
    UNSPEC_CBCDTD
    UNSPEC_DIVE
-   UNSPEC_DIVEO
    UNSPEC_DIVEU
-   UNSPEC_DIVEUO
    UNSPEC_UNPACK_128BIT
    UNSPEC_PACK_128BIT
    UNSPEC_LSQ
@@ -13863,14 +13861,10 @@ (define_insn "cbcdtd"
    (set_attr "length" "4")])
 
 (define_int_iterator UNSPEC_DIV_EXTEND [UNSPEC_DIVE
-					UNSPEC_DIVEO
-					UNSPEC_DIVEU
-					UNSPEC_DIVEUO])
+					UNSPEC_DIVEU])
 
 (define_int_attr div_extend [(UNSPEC_DIVE	"e")
-			     (UNSPEC_DIVEO	"eo")
-			     (UNSPEC_DIVEU	"eu")
-			     (UNSPEC_DIVEUO	"euo")])
+			     (UNSPEC_DIVEU	"eu")])
 
 (define_insn "div<div_extend>_<mode>"
   [(set (match_operand:GPR 0 "register_operand" "=r")
Index: gcc/doc/extend.texi
===================================================================
--- gcc/doc/extend.texi	(revision 258802)
+++ gcc/doc/extend.texi	(working copy)
@@ -15820,22 +15820,17 @@ or @option{-mpopcntd}):
 @smallexample
 long __builtin_bpermd (long, long);
 int __builtin_divwe (int, int);
-int __builtin_divweo (int, int);
 unsigned int __builtin_divweu (unsigned int, unsigned int);
-unsigned int __builtin_divweuo (unsigned int, unsigned int);
 long __builtin_divde (long, long);
-long __builtin_divdeo (long, long);
 unsigned long __builtin_divdeu (unsigned long, unsigned long);
-unsigned long __builtin_divdeuo (unsigned long, unsigned long);
 unsigned int cdtbcd (unsigned int);
 unsigned int cbcdtd (unsigned int);
 unsigned int addg6s (unsigned int, unsigned int);
 void __builtin_rs6000_speculation_barrier (void);
 @end smallexample
 
-The @code{__builtin_divde}, @code{__builtin_divdeo},
-@code{__builtin_divdeu}, @code{__builtin_divdeou} functions require a
-64-bit environment support ISA 2.06 or later.
+The @code{__builtin_divde} and @code{__builtin_divdeu} functions
+require a 64-bit environment supporting ISA 2.06 or later.
 
 The following built-in functions are available for the PowerPC family
 of processors, starting with ISA 3.0 or later (@option{-mcpu=power9}):
Index: gcc/testsuite/gcc.target/powerpc/extend-divide-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/extend-divide-1.c	(revision 258802)
+++ gcc/testsuite/gcc.target/powerpc/extend-divide-1.c	(working copy)
@@ -5,9 +5,7 @@
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
 /* { dg-options "-mcpu=power7 -O2" } */
 /* { dg-final { scan-assembler-times "divwe "   1 } } */
-/* { dg-final { scan-assembler-times "divweo "  1 } } */
 /* { dg-final { scan-assembler-times "divweu "  1 } } */
-/* { dg-final { scan-assembler-times "divweuo " 1 } } */
 /* { dg-final { scan-assembler-not    "bl __builtin" } } */
 
 int
@@ -16,20 +14,8 @@ div_we (int a, int b)
   return __builtin_divwe (a, b);
 }
 
-int
-div_weo (int a, int b)
-{
-  return __builtin_divweo (a, b);
-}
-
 unsigned int
 div_weu (unsigned int a, unsigned int b)
 {
   return __builtin_divweu (a, b);
 }
-
-unsigned int
-div_weuo (unsigned int a, unsigned int b)
-{
-  return __builtin_divweuo (a, b);
-}
Index: gcc/testsuite/gcc.target/powerpc/extend-divide-2.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/extend-divide-2.c	(revision 258802)
+++ gcc/testsuite/gcc.target/powerpc/extend-divide-2.c	(working copy)
@@ -5,9 +5,7 @@
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
 /* { dg-options "-mcpu=power7 -O2" } */
 /* { dg-final { scan-assembler-times "divde "   1 } } */
-/* { dg-final { scan-assembler-times "divdeo "  1 } } */
 /* { dg-final { scan-assembler-times "divdeu "  1 } } */
-/* { dg-final { scan-assembler-times "divdeuo " 1 } } */
 /* { dg-final { scan-assembler-not    "bl __builtin" } } */
 
 long
@@ -16,20 +14,8 @@ div_de (long a, long b)
   return __builtin_divde (a, b);
 }
 
-long
-div_deo (long a, long b)
-{
-  return __builtin_divdeo (a, b);
-}
-
 unsigned long
 div_deu (unsigned long a, unsigned long b)
 {
   return __builtin_divdeu (a, b);
 }
-
-unsigned long
-div_deuo (unsigned long a, unsigned long b)
-{
-  return __builtin_divdeuo (a, b);
-}

[PATCH. rs6000] Fix PR84912: ICE using -m32 on __builtin_divde*, patch #2

[Peter Bergner]

This is the second patch to fix PR84912, which is an ICE when calling some
extended divide builtin functions.  This patch is relative to the first
patch.  This fixes the ICE by adding a new mask to the builtin functions
that are ICEing and then enforcing it is set.  I have also added a helpful
error message in the case it is not set.

This passed bootstrap and regtesting on powerpc64-linux with no regressions.
Ok for mainline?

Do we also want this backported to the open release branches too?

Peter

gcc/
	PR target/84912
	* config/rs6000/rs6000.h (RS6000_BTM_POWERPC64): New define.
	(RS6000_BTM_COMMON): Add RS6000_BTM_POWERPC64.
	* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add support
	for RS6000_BTM_POWERPC64.
	(rs6000_invalid_builtin): Add handling for RS6000_BTM_POWERPC64
	(rs6000_builtin_mask_names): Add RS6000_BTM_POWERPC64.
	* config/rs6000/rs6000-builtin.def (BU_P7_POWERPC64_MISC_2): New macro
	definition.
	(DIVDE): Use it.
	(DIVDEU): Likewise.

diff -urpN -X /home/bergner/cvs/dontdiff gcc-fsf-mainline-pr84912-2/gcc/config/rs6000/rs6000.h gcc-fsf-mainline-pr84912/gcc/config/rs6000/rs6000.h
--- gcc-fsf-mainline-pr84912-2/gcc/config/rs6000/rs6000.h	2018-03-19 19:59:55.911285043 -0500
+++ gcc-fsf-mainline-pr84912/gcc/config/rs6000/rs6000.h	2018-03-22 19:57:21.051923201 -0500
@@ -2506,6 +2506,7 @@ extern int frame_pointer_needed;
 #define RS6000_BTM_HARD_FLOAT	MASK_SOFT_FLOAT	/* Hardware floating point.  */
 #define RS6000_BTM_LDBL128	MASK_MULTIPLE	/* 128-bit long double.  */
 #define RS6000_BTM_64BIT	MASK_64BIT	/* 64-bit addressing.  */
+#define RS6000_BTM_POWERPC64	MASK_POWERPC64	/* 64-bit registers.  */
 #define RS6000_BTM_FLOAT128	MASK_FLOAT128_KEYWORD /* IEEE 128-bit float.  */
 #define RS6000_BTM_FLOAT128_HW	MASK_FLOAT128_HW /* IEEE 128-bit float h/w.  */
 
@@ -2526,6 +2527,7 @@ extern int frame_pointer_needed;
 				 | RS6000_BTM_DFP			\
 				 | RS6000_BTM_HARD_FLOAT		\
 				 | RS6000_BTM_LDBL128			\
+				 | RS6000_BTM_POWERPC64			\
 				 | RS6000_BTM_FLOAT128			\
 				 | RS6000_BTM_FLOAT128_HW)
 
diff -urpN -X /home/bergner/cvs/dontdiff gcc-fsf-mainline-pr84912-2/gcc/config/rs6000/rs6000.c gcc-fsf-mainline-pr84912/gcc/config/rs6000/rs6000.c
--- gcc-fsf-mainline-pr84912-2/gcc/config/rs6000/rs6000.c	2018-03-23 08:03:55.257469347 -0500
+++ gcc-fsf-mainline-pr84912/gcc/config/rs6000/rs6000.c	2018-03-23 08:03:42.707253487 -0500
@@ -3916,6 +3916,7 @@ rs6000_builtin_mask_calculate (void)
 	  | ((TARGET_P9_MISC)		    ? RS6000_BTM_P9_MISC   : 0)
 	  | ((TARGET_MODULO)		    ? RS6000_BTM_MODULO    : 0)
 	  | ((TARGET_64BIT)		    ? RS6000_BTM_64BIT     : 0)
+	  | ((TARGET_POWERPC64)		    ? RS6000_BTM_POWERPC64 : 0)
 	  | ((TARGET_CRYPTO)		    ? RS6000_BTM_CRYPTO	   : 0)
 	  | ((TARGET_HTM)		    ? RS6000_BTM_HTM	   : 0)
 	  | ((TARGET_DFP)		    ? RS6000_BTM_DFP	   : 0)
@@ -15952,6 +15953,10 @@ rs6000_invalid_builtin (enum rs6000_buil
 	   name);
   else if ((fnmask & RS6000_BTM_FLOAT128) != 0)
     error ("builtin function %qs requires the %qs option", name, "-mfloat128");
+  else if ((fnmask & (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64))
+	   == (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64))
+    error ("builtin function %qs requires the %qs and %qs options",
+	   name, "-mcpu=power7 (or newer)", "-m64 or -mpowerpc64");
   else
     error ("builtin function %qs is not supported with the current options",
 	   name);
@@ -36612,6 +36617,7 @@ static struct rs6000_opt_mask const rs60
   { "hard-dfp",		 RS6000_BTM_DFP,	false, false },
   { "hard-float",	 RS6000_BTM_HARD_FLOAT,	false, false },
   { "long-double-128",	 RS6000_BTM_LDBL128,	false, false },
+  { "powerpc64",	 RS6000_BTM_POWERPC64,  false, false },
   { "float128",		 RS6000_BTM_FLOAT128,   false, false },
   { "float128-hw",	 RS6000_BTM_FLOAT128_HW,false, false },
 };
diff -urpN -X /home/bergner/cvs/dontdiff gcc-fsf-mainline-pr84912-2/gcc/config/rs6000/rs6000-builtin.def gcc-fsf-mainline-pr84912/gcc/config/rs6000/rs6000-builtin.def
--- gcc-fsf-mainline-pr84912-2/gcc/config/rs6000/rs6000-builtin.def	2018-03-23 08:03:55.257469347 -0500
+++ gcc-fsf-mainline-pr84912/gcc/config/rs6000/rs6000-builtin.def	2018-03-23 08:03:42.707253487 -0500
@@ -646,6 +646,15 @@
 		     | RS6000_BTC_BINARY),				\
 		    CODE_FOR_ ## ICODE)			/* ICODE */
 
+#define BU_P7_POWERPC64_MISC_2(ENUM, NAME, ATTR, ICODE)			\
+  RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
+		    "__builtin_" NAME,			/* NAME */	\
+		    RS6000_BTM_POPCNTD					\
+		    | RS6000_BTM_POWERPC64,		/* MASK */	\
+		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
+		     | RS6000_BTC_BINARY),				\
+		    CODE_FOR_ ## ICODE)			/* ICODE */
+
 #define BU_P7_MISC_X(ENUM, NAME, ATTR)					\
   RS6000_BUILTIN_X (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
 		    "__builtin_" NAME,			/* NAME */	\
@@ -2311,8 +2320,8 @@ BU_P9V_OVERLOAD_1 (VCTZLSBB,	"vctzlsbb")
 /* 2 argument extended divide functions added in ISA 2.06.  */
 BU_P7_MISC_2 (DIVWE,		"divwe",	CONST,	dive_si)
 BU_P7_MISC_2 (DIVWEU,		"divweu",	CONST,	diveu_si)
-BU_P7_MISC_2 (DIVDE,		"divde",	CONST,	dive_di)
-BU_P7_MISC_2 (DIVDEU,		"divdeu",	CONST,	diveu_di)
+BU_P7_POWERPC64_MISC_2 (DIVDE,	"divde",	CONST,	dive_di)
+BU_P7_POWERPC64_MISC_2 (DIVDEU,	"divdeu",	CONST,	diveu_di)
 
 /* 1 argument DFP (decimal floating point) functions added in ISA 2.05.  */
 BU_DFP_MISC_1 (DXEX,		"dxex",		CONST,	dfp_dxex_dd)

Re: [PATCH. rs6000] Fix PR84912: ICE using -m32 on __builtin_divde*, patch #1

[Segher Boessenkool]

On Fri, Mar 23, 2018 at 12:40:09PM -0500, Peter Bergner wrote:
> This is the first patch to fix PR84912, which is an ICE when calling some
> extended divide builtin functions.  In discussing this offline, we decided
> that all div*o builtin functions make no sense because we don't model the
> OV bit in GCC.  This patch simply removes all div*o builtins and their
> associated documentation.  The next patch will cure the remaining ICEs.
> 
> This passed bootstrap and regtesting on powerpc64-linux with no regressions.
> Ok for mainline?

Okay.  Thanks!

> Do we want this backported to the open release branches too?

It's fine to leave things as-is there, I suppose.  If it makes backports
easier it is fine for 7 as well as for 6 though.

> 	* doc/extend.texi (__builtin_divweo): Remove documention for deleted
> 	builtin function.

Typo ("documentation").


Segher

Re: [PATCH. rs6000] Fix PR84912: ICE using -m32 on __builtin_divde*, patch #2

[Segher Boessenkool]

Hi!

On Fri, Mar 23, 2018 at 12:41:38PM -0500, Peter Bergner wrote:
> This is the second patch to fix PR84912, which is an ICE when calling some
> extended divide builtin functions.  This patch is relative to the first
> patch.  This fixes the ICE by adding a new mask to the builtin functions
> that are ICEing and then enforcing it is set.  I have also added a helpful
> error message in the case it is not set.

> @@ -15952,6 +15953,10 @@ rs6000_invalid_builtin (enum rs6000_buil
>  	   name);
>    else if ((fnmask & RS6000_BTM_FLOAT128) != 0)
>      error ("builtin function %qs requires the %qs option", name, "-mfloat128");
> +  else if ((fnmask & (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64))
> +	   == (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64))
> +    error ("builtin function %qs requires the %qs and %qs options",
> +	   name, "-mcpu=power7 (or newer)", "-m64 or -mpowerpc64");

This does not work for translation, and it quotes the wrong things.
Each %qs should be for exactly one option string.

Looks good otherwise.


Segher

Re: [PATCH. rs6000] Fix PR84912: ICE using -m32 on __builtin_divde*, patch #2

[Peter Bergner]

On 3/27/18 5:02 PM, Segher Boessenkool wrote:
>> @@ -15952,6 +15953,10 @@ rs6000_invalid_builtin (enum rs6000_buil
>>  	   name);
>>    else if ((fnmask & RS6000_BTM_FLOAT128) != 0)
>>      error ("builtin function %qs requires the %qs option", name, "-mfloat128");
>> +  else if ((fnmask & (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64))
>> +	   == (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64))
>> +    error ("builtin function %qs requires the %qs and %qs options",
>> +	   name, "-mcpu=power7 (or newer)", "-m64 or -mpowerpc64");
> 
> This does not work for translation, and it quotes the wrong things.
> Each %qs should be for exactly one option string.

I'm confused. :-)   What is it I need to do to fix this?  I just cut/pasted
usage higher up in the function, so does that need fixing too or ???

Peter

Re: [PATCH. rs6000] Fix PR84912: ICE using -m32 on __builtin_divde*, patch #2

[Segher Boessenkool]

On Wed, Mar 28, 2018 at 10:38:49AM -0500, Peter Bergner wrote:
> On 3/27/18 5:02 PM, Segher Boessenkool wrote:
> >> @@ -15952,6 +15953,10 @@ rs6000_invalid_builtin (enum rs6000_buil
> >>  	   name);
> >>    else if ((fnmask & RS6000_BTM_FLOAT128) != 0)
> >>      error ("builtin function %qs requires the %qs option", name, "-mfloat128");
> >> +  else if ((fnmask & (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64))
> >> +	   == (RS6000_BTM_POPCNTD | RS6000_BTM_POWERPC64))
> >> +    error ("builtin function %qs requires the %qs and %qs options",
> >> +	   name, "-mcpu=power7 (or newer)", "-m64 or -mpowerpc64");
> > 
> > This does not work for translation, and it quotes the wrong things.
> > Each %qs should be for exactly one option string.
> 
> I'm confused. :-)   What is it I need to do to fix this?  I just cut/pasted
> usage higher up in the function, so does that need fixing too or ???

It should be something like

+    error ("builtin function %qs requires the %qs (or newer), and "
	   "%qs or %qs options",
+	   name, "-mcpu=power7", "-m64", "-mpowerpc64");

I don't see other such strings that quote incorrectly?


Segher

Re: [PATCH. rs6000] Fix PR84912: ICE using -m32 on __builtin_divde*, patch #2

[Peter Bergner]

On 3/28/18 12:59 PM, Segher Boessenkool wrote:
> It should be something like
> 
> +    error ("builtin function %qs requires the %qs (or newer), and "
> 	   "%qs or %qs options",
> +	   name, "-mcpu=power7", "-m64", "-mpowerpc64");
> 
> I don't see other such strings that quote incorrectly?

Ah, I guess I misunderstood what you were saying.  So ok for trunk
with that change then?

Peter

Re: [PATCH. rs6000] Fix PR84912: ICE using -m32 on __builtin_divde*, patch #2

[Segher Boessenkool]

On Wed, Mar 28, 2018 at 01:57:34PM -0500, Peter Bergner wrote:
> On 3/28/18 12:59 PM, Segher Boessenkool wrote:
> > It should be something like
> > 
> > +    error ("builtin function %qs requires the %qs (or newer), and "
> > 	   "%qs or %qs options",
> > +	   name, "-mcpu=power7", "-m64", "-mpowerpc64");
> > 
> > I don't see other such strings that quote incorrectly?
> 
> Ah, I guess I misunderstood what you were saying.  So ok for trunk
> with that change then?

"Something like", I haven't tested anything.  Please do test :-)

Okay with that.  Thanks!


Segher

Re: [PATCH. rs6000] Fix PR84912: ICE using -m32 on __builtin_divde*, patch #2

[Peter Bergner]

On 3/28/18 4:13 PM, Segher Boessenkool wrote:
> On Wed, Mar 28, 2018 at 01:57:34PM -0500, Peter Bergner wrote:
>> On 3/28/18 12:59 PM, Segher Boessenkool wrote:
>>> It should be something like
>>>
>>> +    error ("builtin function %qs requires the %qs (or newer), and "
>>> 	   "%qs or %qs options",
>>> +	   name, "-mcpu=power7", "-m64", "-mpowerpc64");
>>>
>>> I don't see other such strings that quote incorrectly?
>>
>> Ah, I guess I misunderstood what you were saying.  So ok for trunk
>> with that change then?
> 
> "Something like", I haven't tested anything.  Please do test :-)
> 
> Okay with that.  Thanks!

Tested and committed...both patches.  Thanks.

Do we care enough to fix these on the release branches?  If so, I
can backport them easily, since they're not that involved.
I'll leave it up to you to decide.

Peter

Re: [PATCH. rs6000] Fix PR84912: ICE using -m32 on __builtin_divde*, patch #2

[Segher Boessenkool]

On Wed, Mar 28, 2018 at 07:13:36PM -0500, Peter Bergner wrote:
> On 3/28/18 4:13 PM, Segher Boessenkool wrote:
> > On Wed, Mar 28, 2018 at 01:57:34PM -0500, Peter Bergner wrote:
> >> On 3/28/18 12:59 PM, Segher Boessenkool wrote:
> >>> It should be something like
> >>>
> >>> +    error ("builtin function %qs requires the %qs (or newer), and "
> >>> 	   "%qs or %qs options",
> >>> +	   name, "-mcpu=power7", "-m64", "-mpowerpc64");
> >>>
> >>> I don't see other such strings that quote incorrectly?
> >>
> >> Ah, I guess I misunderstood what you were saying.  So ok for trunk
> >> with that change then?
> > 
> > "Something like", I haven't tested anything.  Please do test :-)
> > 
> > Okay with that.  Thanks!
> 
> Tested and committed...both patches.  Thanks.
> 
> Do we care enough to fix these on the release branches?  If so, I
> can backport them easily, since they're not that involved.
> I'll leave it up to you to decide.

If it's easy, yes please.  After the usual wait.


Segher

Re: [PATCH. rs6000] Fix PR84912: ICE using -m32 on __builtin_divde*, patch #2

[Peter Bergner]

On 3/28/18 7:21 PM, Segher Boessenkool wrote:
> On Wed, Mar 28, 2018 at 07:13:36PM -0500, Peter Bergner wrote:
>> Do we care enough to fix these on the release branches?  If so, I
>> can backport them easily, since they're not that involved.
>> I'll leave it up to you to decide.
> 
> If it's easy, yes please.  After the usual wait.

Yes it was easy.  Committed now to GCC 7 and GCC 6.  Thanks.

Peter