From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 54368 invoked by alias); 12 Nov 2018 11:46:20 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 54359 invoked by uid 89); 12 Nov 2018 11:46:20 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,SPF_PASS autolearn=ham version=3.3.2 spammy=Client, mill, aes, AES X-HELO: mx1.suse.de Received: from mx2.suse.de (HELO mx1.suse.de) (195.135.220.15) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 12 Nov 2018 11:46:18 +0000 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 8AD81B08A for ; Mon, 12 Nov 2018 11:46:16 +0000 (UTC) From: =?UTF-8?Q?Martin_Li=c5=a1ka?= Subject: [PATCH][DOCS] Fix documentation of __builtin_cpu_is and __builtin_cpu_supports for x86. To: gcc-patches@gcc.gnu.org Message-ID: Date: Mon, 12 Nov 2018 11:46:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.3.0 MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------7B9A275745F57F66966417F0" X-IsSubscribed: yes X-SW-Source: 2018-11/txt/msg00926.txt.bz2 This is a multi-part message in MIME format. --------------7B9A275745F57F66966417F0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Content-length: 396 Hi. The patch is adding missing values for aforementioned built-ins. Ready for trunk? Thanks, Martin gcc/ChangeLog: 2018-11-12 Martin Liska * doc/extend.texi: Add missing values for __builtin_cpu_is and __builtin_cpu_supports for x86 target. --- gcc/doc/extend.texi | 100 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 98 insertions(+), 2 deletions(-) --------------7B9A275745F57F66966417F0 Content-Type: text/x-patch; name="0001-Fix-documentation-of-__builtin_cpu_is-and-__builtin_.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename*0="0001-Fix-documentation-of-__builtin_cpu_is-and-__builtin_.pa"; filename*1="tch" Content-length: 2449 diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index ebdc0cec789..04a069fc366 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -20422,12 +20422,18 @@ is of type @var{cpuname} and returns @code{0} otherwise. The following CPU names can be detected: @table @samp +@item amd +AMD CPU. + @item intel Intel CPU. @item atom Intel Atom CPU. +@item slm +Intel Silvermont CPU. + @item core2 Intel Core 2 CPU. @@ -20443,8 +20449,50 @@ Intel Core i7 Westmere CPU. @item sandybridge Intel Core i7 Sandy Bridge CPU. -@item amd -AMD CPU. +@item ivybridge +Intel Core i7 Ivy Bridge CPU. + +@item haswell +Intel Core i7 Haswell CPU. + +@item broadwell +Intel Core i7 Broadwell CPU. + +@item skylake +Intel Core i7 Skylake CPU. + +@item skylake-avx512 +Intel Core i7 Skylake AVX512 CPU. + +@item cannonlake +Intel Core i7 Cannon Lake CPU. + +@item icelake-client +Intel Core i7 Ice Lake Client CPU. + +@item icelake-server +Intel Core i7 Ice Lake Server CPU. + +@item bonnell +Intel Atom Bonnell CPU. + +@item silvermont +Intel Atom Silvermont CPU. + +@item goldmont +Intel Atom Goldmont CPU. + +@item goldmont-plus +Intel Atom Goldmont Plus CPU. + +@item tremont +Intel Atom Tremont CPU. + +@item knl +Intel Knights Landing CPU. + +@item knm +Intel Knights Mill CPU. @item amdfam10h AMD Family 10h CPU. @@ -20530,8 +20578,56 @@ SSE4.2 instructions. AVX instructions. @item avx2 AVX2 instructions. +@item sse4a +SSE4A instructions. +@item fma4 +FMA4 instructions. +@item xop +XOP instructions. +@item fma +FMA instructions. @item avx512f AVX512F instructions. +@item bmi +BMI instructions. +@item bmi2 +BMI2 instructions. +@item aes +AES instructions. +@item pclmul +PCLMUL instructions. +@item avx512vl +AVX512VL instructions. +@item avx512bw +AVX512BW instructions. +@item avx512dq +AVX512DQ instructions. +@item avx512cd +AVX512CD instructions. +@item avx512er +AVX512ER instructions. +@item avx512pf +AVX512PF instructions. +@item avx512vbmi +AVX512VBMI instructions. +@item avx512ifma +AVX512IFMA instructions. +@item avx5124vnniw +AVX5124VNNIW instructions. +@item avx5124fmaps +AVX5124FMAPS instructions. +@item avx512vpopcntdq +AVX512VPOPCNTDQ instructions. +@item avx512vbmi2 +AVX512VBMI2 instructions. +@item gfni +GFNI instructions. +@item vpclmulqdq +VPCLMULQDQ instructions. +@item avx512vnni +AVX512VNNI instructions. +@item avx512bitalg +AVX512BITALG instructions. @end table Here is an example: --------------7B9A275745F57F66966417F0--