Re: [RFA] New pass for sign/zero extension elimination

[Jeff Law <jeffreyalaw@gmail.com>]

On 11/27/23 10:36, Joern Rennecke wrote:
> On 11/20/23 11:26, Richard Sandiford wrote:
> 
>>> +
>>> +      mask = GET_MODE_MASK (GET_MODE (SUBREG_REG (x))) << bit;
>>> +      if (!mask)
>>> + mask = -0x100000000ULL;
>>
>> Not sure I follow this.  What does the -0x100000000ULL constant indicate?
>> Also, isn't it the mask of the outer register that is shifted, rather
>> than the mask of the inner mode?  E.g. if we have:
> Jeff Law:
>> Inherited.  I should have marked it like the other one as needing
>> investigation.  Probably the fastest way is to just rip it out for a
>> test to see what breaks.
> 
> This is for support of types wider than DImode.
> 
> You unsupported tracking of these values in various places, though.
Because we don't track liveness beyond DImode in this code at all and if 
you don't filter out the larger modes, things will go wonky in a bad 
way.  It may be less of an issue after fixing the big endian correction 
code which was totally broken.

Supporting TI, OI, etc would certainly be possible, but it didn't seem 
worth the effort on current architectures.

Jeff