From: Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>
To: Bernd Edlinger <bernd.edlinger@hotmail.de>,
Christophe Lyon <christophe.lyon@linaro.org>
Cc: Richard Biener <rguenther@suse.de>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
Richard Earnshaw <richard.earnshaw@arm.com>,
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>,
Eric Botcazou <ebotcazou@adacore.com>, Jeff Law <law@redhat.com>,
Jakub Jelinek <jakub@redhat.com>
Subject: Re: [PATCH] Sanitizing the middle-end interface to the back-end for strict alignment
Date: Thu, 29 Aug 2019 09:09:00 -0000 [thread overview]
Message-ID: <c5f7ab78-685e-00e4-97b7-0f1904e4ac90@foss.arm.com> (raw)
In-Reply-To: <AM6PR10MB2566A1388260EB6592B95AB7E4A30@AM6PR10MB2566.EURPRD10.PROD.OUTLOOK.COM>
Hi Bernd,
On 8/28/19 10:36 PM, Bernd Edlinger wrote:
> On 8/28/19 2:07 PM, Christophe Lyon wrote:
>> Hi,
>>
>> This patch causes an ICE when building libgcc's unwind-arm.o
>> when configuring GCC:
>> --target arm-none-linux-gnueabihf --with-mode thumb --with-cpu
>> cortex-a15 --with-fpu neon-vfpv4:
>>
>> The build works for the same target, but --with-mode arm --with-cpu
>> cortex a9 --with-fpu vfp
>>
>> In file included from
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/libgcc/config/arm/unwind-arm.c:144:
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/libgcc/unwind-arm-common.inc:
>> In function 'get_eit_entry':
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/libgcc/unwind-arm-common.inc:245:29:
>> warning: cast discards 'const' qualifier from pointer target type
>> [-Wcast-qual]
>> 245 | ucbp->pr_cache.ehtp = (_Unwind_EHT_Header *)&eitp->content;
>> | ^
>> during RTL pass: expand
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/libgcc/unwind-arm-common.inc:
>> In function 'unwind_phase2_forced':
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/libgcc/unwind-arm-common.inc:319:18:
>> internal compiler error: in gen_movdi, at config/arm/arm.md:5235
>> 319 | saved_vrs.core = entry_vrs->core;
>> | ~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~
>> 0x126530f gen_movdi(rtx_def*, rtx_def*)
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/config/arm/arm.md:5235
>> 0x896d92 insn_gen_fn::operator()(rtx_def*, rtx_def*) const
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/recog.h:318
>> 0x896d92 emit_move_insn_1(rtx_def*, rtx_def*)
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:3694
>> 0x897083 emit_move_insn(rtx_def*, rtx_def*)
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:3790
>> 0xfc25d6 gen_cpymem_ldrd_strd(rtx_def**)
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/config/arm/arm.c:14582
>> 0x126a1f1 gen_cpymemqi(rtx_def*, rtx_def*, rtx_def*, rtx_def*)
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/config/arm/arm.md:6688
>> 0xb0bc08 maybe_expand_insn(insn_code, unsigned int, expand_operand*)
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/optabs.c:7440
>> 0x89ba1e emit_block_move_via_cpymem
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:1808
>> 0x89ba1e emit_block_move_hints(rtx_def*, rtx_def*, rtx_def*,
>> block_op_methods, unsigned int, long, unsigned long, unsigned long,
>> unsigned long, bool, bool*)
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:1627
>> 0x89c383 emit_block_move(rtx_def*, rtx_def*, rtx_def*, block_op_methods)
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:1667
>> 0x89fb4e store_expr(tree_node*, rtx_def*, int, bool, bool)
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:5845
>> 0x88c1f9 store_field
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:7149
>> 0x8a0c22 expand_assignment(tree_node*, tree_node*, bool)
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/expr.c:5304
>> 0x761964 expand_gimple_stmt_1
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/cfgexpand.c:3779
>> 0x761964 expand_gimple_stmt
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/cfgexpand.c:3875
>> 0x768583 expand_gimple_basic_block
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/cfgexpand.c:5915
>> 0x76abc6 execute
>> /tmp/6852788_4.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/cfgexpand.c:6538
>>
>> Christophe
>>
> Okay, sorry for the breakage.
>
> What is happening in gen_cpymem_ldrd_strd is of course against the rules:
>
> It uses emit_move_insn on only 4-byte aligned DI-mode memory operands.
>
> I have a patch for this, which is able to fix the libgcc build on a cross, but have no
> possibility to bootstrap the affected target.
>
> Could you please help?
Well it's good that the sanitisation is catching the bugs!
Bootstrapping this patch I get another assert with the backtrace:
$BUILD/arm-none-linux-gnueabihf/libstdc++-v3/include/ext/concurrence.h:
In function '(static initializers for
$SRC/libstdc++-v3/libsupc++/eh_alloc.cc)':
$BUILD/arm-none-linux-gnueabihf/libstdc++-v3/include/ext/concurrence.h:129:5:
internal compiler error: in gen_movv8qi, at config/arm/vec-common.md:29
 129 |    {
     |    ^
0x14155cb gen_movv8qi(rtx_def*, rtx_def*)
       $SRC/gcc/config/arm/vec-common.md:29
0x96bb89 insn_gen_fn::operator()(rtx_def*, rtx_def*) const
       $SRC/gcc/recog.h:318
0x94bc95 emit_move_insn_1(rtx_def*, rtx_def*)
       $SRC/gcc/expr.c:3694
0x94c05b emit_move_insn(rtx_def*, rtx_def*)
       $SRC/gcc/expr.c:3790
0x10d5ee5 arm_block_set_aligned_vect
       $SRC/gcc/config/arm/arm.c:30204
0x10d6b37 arm_block_set_vect
       $SRC/gcc/config/arm/arm.c:30428
0x10d6caf arm_gen_setmem(rtx_def**)
       $SRC/gcc/config/arm/arm.c:30458
0x140d7ed gen_setmemsi(rtx_def*, rtx_def*, rtx_def*, rtx_def*)
       $SRC/gcc/config/arm/arm.md:6687
0xbf0e87 insn_gen_fn::operator()(rtx_def*, rtx_def*, rtx_def*, rtx_def*)
const
       $SRC/gcc/recog.h:320
0xbf0999 maybe_gen_insn(insn_code, unsigned int, expand_operand*)
       $SRC/gcc/optabs.c:7409
0xbf0b87 maybe_expand_insn(insn_code, unsigned int, expand_operand*)
       $SRC/gcc/optabs.c:7440
0x94a709 set_storage_via_setmem(rtx_def*, rtx_def*, rtx_def*, unsigned
int, unsigned int, long long, unsigned long long, unsigned long long,
unsigned long long)
       $SRC/gcc/expr.c:3168
0x94a059 clear_storage_hints(rtx_def*, rtx_def*, block_op_methods,
unsigned int, long long, unsigned long long, unsigned long long,
unsigned long long)
       $SRC/gcc/expr.c:3037
0x94a137 clear_storage(rtx_def*, rtx_def*, block_op_methods)
       $SRC/gcc/expr.c:3058
0x9537c5 store_constructor
       $SRC/gcc/expr.c:6333
0x957227 store_field
       $SRC/gcc/expr.c:7145
0x94fde1 expand_assignment(tree_node*, tree_node*, bool)
       $SRC/gcc/expr.c:5301
0x815e25 expand_gimple_stmt_1
       $SRC/gcc/cfgexpand.c:3777
0x81611d expand_gimple_stmt
       $SRC/gcc/cfgexpand.c:3875
0x81cd61 expand_gimple_basic_block
       $SRC/gcc/cfgexpand.c:5915
Looks to me like arm_gen_setmem needs similar fixes to gen_cpymem_ldrd_strd?
Thanks,
Kyrill
>
>
> Thanks
> Bernd.
next prev parent reply other threads:[~2019-08-29 8:58 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-10 12:51 [PATCHv2] Fix not 8-byte aligned ldrd/strd on ARMv5 (PR 89544) Bernd Edlinger
2019-03-19 14:01 ` [PING] " Bernd Edlinger
2019-03-21 11:26 ` Richard Biener
2019-03-22 17:47 ` Bernd Edlinger
2019-03-25 9:28 ` Richard Biener
2019-07-30 22:13 ` [PATCHv3] " Bernd Edlinger
2019-07-31 13:17 ` Richard Earnshaw (lists)
2019-08-01 11:19 ` Bernd Edlinger
2019-08-02 9:10 ` Richard Earnshaw (lists)
2019-08-02 13:11 ` Richard Biener
2019-08-02 19:01 ` Bernd Edlinger
2019-08-08 14:20 ` [PATCHv4] " Bernd Edlinger
2019-08-14 10:54 ` [PING] " Bernd Edlinger
2019-08-14 12:27 ` Richard Biener
2019-08-14 22:26 ` Bernd Edlinger
2019-08-15 8:58 ` Richard Biener
2019-08-15 12:38 ` Bernd Edlinger
2019-08-15 13:03 ` Richard Biener
2019-08-15 14:33 ` Richard Biener
2019-08-15 15:28 ` Bernd Edlinger
2019-08-15 17:42 ` Richard Biener
2019-08-15 21:19 ` [PATCHv5] " Bernd Edlinger
2019-08-20 5:38 ` Jeff Law
2019-08-20 15:04 ` John David Anglin
[not found] ` <0d39b64f-67d9-7857-cf4e-36f09c0dc15e@bell.net>
2019-08-20 16:03 ` Fwd: " Bernd Edlinger
2019-09-04 12:53 ` Richard Earnshaw (lists)
2019-09-04 13:29 ` Bernd Edlinger
2019-09-04 14:14 ` Richard Earnshaw (lists)
2019-09-04 15:00 ` Bernd Edlinger
2019-09-04 15:48 ` Richard Earnshaw (lists)
2019-09-05 9:21 ` Richard Earnshaw (lists)
2019-09-05 9:35 ` Bernd Edlinger
2019-09-06 10:15 ` Bernd Edlinger
2019-09-06 10:18 ` Richard Earnshaw (lists)
2019-08-15 21:27 ` [PATCH] Sanitizing the middle-end interface to the back-end for strict alignment Bernd Edlinger
2019-08-17 10:11 ` Bernd Edlinger
2019-08-23 0:01 ` Jeff Law
2019-08-23 0:05 ` Jeff Law
2019-08-23 15:15 ` [PING] " Bernd Edlinger
2019-08-27 10:07 ` Kyrill Tkachov
2019-08-28 11:50 ` Bernd Edlinger
2019-08-28 12:01 ` Kyrill Tkachov
2019-08-28 13:54 ` Christophe Lyon
2019-08-28 21:48 ` Bernd Edlinger
2019-08-29 9:09 ` Kyrill Tkachov [this message]
2019-08-29 10:00 ` Christophe Lyon
2019-08-29 22:57 ` Bernd Edlinger
2019-08-30 10:07 ` Kyrill Tkachov
2019-08-30 15:22 ` Christophe Lyon
2019-08-14 11:56 ` [PATCHv3] Fix not 8-byte aligned ldrd/strd on ARMv5 (PR 89544) Richard Biener
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