From: Jeff Law <jeffreyalaw@gmail.com>
To: Juzhe-Zhong <juzhe.zhong@rivai.ai>, gcc-patches@gcc.gnu.org
Cc: kito.cheng@sifive.com, palmer@rivosinc.com, rdapp.gcc@gmail.com,
kito.cheng@gmail.com
Subject: Re: [PATCH V3] RISC-V: Add TARGET_MIN_VLEN > 4096 check
Date: Mon, 17 Jul 2023 08:24:55 -0600 [thread overview]
Message-ID: <c60e0954-0423-4a4d-f374-0c707830a1dc@gmail.com> (raw)
In-Reply-To: <20230717142002.295213-1-juzhe.zhong@rivai.ai>
On 7/17/23 08:20, Juzhe-Zhong wrote:
> gcc/ChangeLog:
>
> * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/zvl-unimplemented-1.c: New test.
> * gcc.target/riscv/rvv/base/zvl-unimplemented-2.c: New test.
OK
jeff
next prev parent reply other threads:[~2023-07-17 14:24 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-17 14:20 Juzhe-Zhong
2023-07-17 14:24 ` Jeff Law [this message]
2023-07-21 21:16 ` Andreas Schwab
2023-07-21 21:20 ` Jeff Law
2023-07-24 14:16 ` Jeff Law
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