From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 25989 invoked by alias); 19 Apr 2004 13:32:34 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 25961 invoked from network); 19 Apr 2004 13:32:33 -0000 Received: from unknown (HELO main.gmane.org) (80.91.224.249) by sources.redhat.com with SMTP; 19 Apr 2004 13:32:33 -0000 Received: from list by main.gmane.org with local (Exim 3.35 #1 (Debian)) id 1BFYsz-0005rF-00 for ; Mon, 19 Apr 2004 15:32:33 +0200 Received: from paride.rett.polimi.it ([131.175.65.135]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Mon, 19 Apr 2004 15:32:33 +0200 Received: from bonzini by paride.rett.polimi.it with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Mon, 19 Apr 2004 15:32:33 +0200 To: gcc-patches@gcc.gnu.org From: "Paolo Bonzini" Subject: Disable -frename-registers Date: Mon, 19 Apr 2004 13:32:00 -0000 Message-ID: References: Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_016D_01C42623.BAA51B70" X-Complaints-To: usenet@sea.gmane.org X-Gmane-NNTP-Posting-Host: paride.rett.polimi.it X-Newsreader: Microsoft Outlook Express 6.00.2800.1158 X-SW-Source: 2004-04/txt/msg01162.txt.bz2 This is a multi-part message in MIME format. ------=_NextPart_000_016D_01C42623.BAA51B70 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-length: 512 > It seems like -frename-registers is generally > broken, or triggers generally broken code. What about the attached patch? Would it be ok to commit as obvious? Sorry for the breakage. Paolo 2004-04-19 Paolo Bonzini Revert part of 2004-04-17 change to * toplev.c (flag_rename_registers): Initialize to 0. * doc/invoke.texi (Optimize options): Move -frename-registers to "Not triggered by any -O level" section. Adjust commentary accordingly. ------=_NextPart_000_016D_01C42623.BAA51B70 Content-Type: application/octet-stream; name="disable-regrename.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="disable-regrename.patch" Content-length: 3098 Index: toplev.c=0A= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=0A= RCS file: /cvs/gcc/gcc/gcc/toplev.c,v=0A= retrieving revision 1.893=0A= diff -u -r1.893 toplev.c=0A= --- toplev.c 17 Apr 2004 06:53:43 -0000 1.893=0A= +++ toplev.c 19 Apr 2004 13:28:29 -0000=0A= @@ -268,8 +268,9 @@=0A= =20=0A= /* Nonzero if registers should be renamed. When=0A= flag_rename_registers =3D=3D AUTODETECT_FLAG_VAR_TRACKING it will be se= t=0A= - according to optimize and default_debug_hooks in process_options (). *= /=0A= -int flag_rename_registers =3D AUTODETECT_FLAG_VAR_TRACKING;=0A= + according to optimize and default_debug_hooks in process_options (),=0A= + but we do not do this yet because it triggers aborts in flow.c. */=0A= +int flag_rename_registers =3D 0;=0A= int flag_cprop_registers =3D 0;=0A= =20=0A= /* Nonzero for -pedantic switch: warn about anything=0A= Index: doc/invoke.texi=0A= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=0A= RCS file: /cvs/gcc/gcc/gcc/doc/invoke.texi,v=0A= retrieving revision 1.447=0A= diff -u -r1.447 invoke.texi=0A= --- doc/invoke.texi 18 Apr 2004 23:17:28 -0000 1.447=0A= +++ doc/invoke.texi 19 Apr 2004 13:28:32 -0000=0A= @@ -4342,19 +4342,6 @@=0A= =20=0A= Enabled at levels @option{-O2}, @option{-O3}.=0A= =20=0A= -@item -frename-registers=0A= -@opindex frename-registers=0A= -Attempt to avoid false dependencies in scheduled code by making use=0A= -of registers left over after register allocation. This optimization=0A= -will most benefit processors with lots of registers. Depending on the=0A= -debug information format adopted by the target, however, it can=0A= -make debugging impossible, since variables will no longer stay in=0A= -a ``home register''.=0A= -=0A= -Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os},= =0A= -on targets where the default format for debugging information supports=0A= -variable tracking.=0A= -=0A= @item -fweb=0A= @opindex fweb=0A= Constructs webs as commonly used for register allocation purposes and assi= gn=0A= @@ -4574,6 +4561,17 @@=0A= using the knowledge about the value of the denominator.=0A= =20=0A= Enabled with @option{-profile-generate} and @option{-profile-use}.=0A= +=0A= +@item -frename-registers=0A= +@opindex frename-registers=0A= +Attempt to avoid false dependencies in scheduled code by making use=0A= +of registers left over after register allocation. This optimization=0A= +will most benefit processors with lots of registers. Depending on the=0A= +debug information format adopted by the target, however, it can=0A= +make debugging impossible, since variables will no longer stay in=0A= +a ``home register''.=0A= +=0A= +Not enabled by default at any level because it has known bugs.=0A= =20=0A= @item -fnew-ra=0A= @opindex fnew-ra=0A= ------=_NextPart_000_016D_01C42623.BAA51B70--