From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id BF6E53857705 for ; Thu, 5 Oct 2023 12:03:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org BF6E53857705 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=foss.arm.com Authentication-Results: sourceware.org; spf=none smtp.mailfrom=foss.arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 24DC712FC; Thu, 5 Oct 2023 05:04:35 -0700 (PDT) Received: from [10.57.1.138] (unknown [10.57.1.138]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5D6AC3F59C; Thu, 5 Oct 2023 05:03:55 -0700 (PDT) Message-ID: Date: Thu, 5 Oct 2023 13:03:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.0 Subject: Re: [PATCH 2/6] aarch64: Add support for aarch64-sys-regs.def Content-Language: en-GB To: Victor Do Nascimento , gcc-patches@gcc.gnu.org Cc: kyrylo.tkachov@arm.com, richard.sandiford@arm.com, Richard.Earnshaw@arm.com References: <20231003151920.1853404-1-victor.donascimento@arm.com> <20231003151920.1853404-3-victor.donascimento@arm.com> From: Richard Earnshaw In-Reply-To: <20231003151920.1853404-3-victor.donascimento@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3497.6 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,NICE_REPLY_A,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 03/10/2023 16:18, Victor Do Nascimento wrote: > This patch defines the structure of a new .def file used for > representing the aarch64 system registers, what information it should > hold and the basic framework in GCC to process this file. > > Entries in the aarch64-system-regs.def file should be as follows: > > SYSREG (NAME, CPENC (sn,op1,cn,cm,op2), FLAG1 | ... | FLAGn, ARCH) > > Where the arguments to SYSREG correspond to: > - NAME: The system register name, as used in the assembly language. > - CPENC: The system register encoding, mapping to: > > s__c_c_ > > - FLAG: The entries in the FLAGS field are bitwise-OR'd together to > encode extra information required to ensure proper use of > the system register. For example, a read-only system > register will have the flag F_REG_READ, while write-only > registers will be labeled F_REG_WRITE. Such flags are > tested against at compile-time. > - ARCH: The architectural features the system register is associated > with. This is encoded via one of three possible macros: > 1. When a system register is universally implemented, we say > it has no feature requirements, so we tag it with the > AARCH64_NO_FEATURES macro. > 2. When a register is only implemented for a single > architectural extension EXT, the AARCH64_FEATURE (EXT), is > used. > 3. When a given system register is made available by any of N > possible architectural extensions, the AARCH64_FEATURES(N, ...) > macro is used to combine them accordingly. > > In order to enable proper interpretation of the SYSREG entries by the > compiler, flags defining system register behavior such as `F_REG_READ' > and `F_REG_WRITE' are also defined here, so they can later be used for > the validation of system register properties. > > Finally, any architectural feature flags from Binutils missing from GCC > have appropriate aliases defined here so as to ensure > cross-compatibility of SYSREG entries across the toolchain. > > gcc/ChangeLog: > > * gcc/config/aarch64/aarch64.cc (sysreg_names): New. > (sysreg_names_generic): Likewise. > (sysreg_reqs): Likewise. > (sysreg_properties): Likewise. > (nsysreg): Likewise. > * gcc/config/aarch64/aarch64.h (AARCH64_ISA_V8A): Add missing > ISA flag. > (AARCH64_ISA_V8_1A): Likewise. > (AARCH64_ISA_V8_7A): Likewise. > (AARCH64_ISA_V8_8A): Likewise. > (AARCH64_NO_FEATURES): Likewise. > (AARCH64_FL_RAS): New ISA flag alias. > (AARCH64_FL_LOR): Likewise. > (AARCH64_FL_PAN): Likewise. > (AARCH64_FL_AMU): Likewise. > (AARCH64_FL_SCXTNUM): Likewise. > (AARCH64_FL_ID_PFR2): Likewise. > (F_DEPRECATED): New. > (F_REG_READ): Likewise. > (F_REG_WRITE): Likewise. > (F_ARCHEXT): Likewise. > (F_REG_ALIAS): Likewise. > --- > gcc/config/aarch64/aarch64.cc | 55 +++++++++++++++++++++++++++++++++++ > gcc/config/aarch64/aarch64.h | 36 +++++++++++++++++++++++ > 2 files changed, 91 insertions(+) > > diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc > index 9fbfc548a89..030b39ded1a 100644 > --- a/gcc/config/aarch64/aarch64.cc > +++ b/gcc/config/aarch64/aarch64.cc > @@ -89,6 +89,8 @@ > /* This file should be included last. */ > #include "target-def.h" > > +#include "aarch64.h" This shouldn't be needed. target.h (included further up) includes tm.h which includes this file. Otherwise OK. Reviewed-by: rearnsha@arm.com > + > /* Defined for convenience. */ > #define POINTER_BYTES (POINTER_SIZE / BITS_PER_UNIT) > > @@ -2807,6 +2809,59 @@ static const struct processor all_cores[] = > {NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, NULL} > }; > > +/* Database of system register names. */ > +const char *sysreg_names[] = > +{ > +#define SYSREG(NAME, ENC, FLAGS, ARCH) NAME, > +#include "aarch64-sys-regs.def" > +#undef SYSREG > +}; > + > +const char *sysreg_names_generic[] = > +{ > +#define CPENC(SN, OP1, CN, CM, OP2) "s"#SN"_"#OP1"_c"#CN"_c"#CM"_"#OP2 > +#define SYSREG(NAME, ENC, FLAGS, ARCH) ENC, > +#include "aarch64-sys-regs.def" > +#undef SYSREG > +}; > + > +/* An aarch64_feature_set initializer for a single feature, > + AARCH64_FEATURE_. */ > +#define AARCH64_FEATURE(FEAT) AARCH64_FL_##FEAT > + > +/* Used by AARCH64_FEATURES. */ > +#define AARCH64_OR_FEATURES_1(X, F1) \ > + AARCH64_FEATURE (F1) > +#define AARCH64_OR_FEATURES_2(X, F1, F2) \ > + (AARCH64_FEATURE (F1) | AARCH64_OR_FEATURES_1 (X, F2)) > +#define AARCH64_OR_FEATURES_3(X, F1, ...) \ > + (AARCH64_FEATURE (F1) | AARCH64_OR_FEATURES_2 (X, __VA_ARGS__)) > + > +/* An aarch64_feature_set initializer for the N features listed in "...". */ > +#define AARCH64_FEATURES(N, ...) \ > + AARCH64_OR_FEATURES_##N (0, __VA_ARGS__) > + > +/* Database of system register architectural requirements. */ > +const unsigned long long sysreg_reqs[] = > +{ > +#define SYSREG(NAME, ENC, FLAGS, ARCH) ARCH, > +#include "aarch64-sys-regs.def" > +#undef SYSREG > +}; > + > +/* Database of system register properties. Properties assigned unique > + bits in bitfield and combined via bitwise-OR. */ > +const unsigned sysreg_properties[] = > +{ > +#define SYSREG(NAME, ENC, FLAGS, ARCH) FLAGS, > +#include "aarch64-sys-regs.def" > +#undef SYSREG > +}; > + > +#define TOTAL_ITEMS (sizeof sysreg_reqs / sizeof sysreg_reqs[0]) > +const unsigned nsysreg = TOTAL_ITEMS; > +#undef TOTAL_ITEMS > + > /* The current tuning set. */ > struct tune_params aarch64_tune_params = generic_tunings; > > diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h > index d74e9116fc5..cf3969a11aa 100644 > --- a/gcc/config/aarch64/aarch64.h > +++ b/gcc/config/aarch64/aarch64.h > @@ -179,6 +179,8 @@ enum class aarch64_feature : unsigned char { > > /* Macros to test ISA flags. */ > > +#define AARCH64_ISA_V8A (aarch64_isa_flags & AARCH64_FL_V8A) > +#define AARCH64_ISA_V8_1A (aarch64_isa_flags & AARCH64_FL_V8_1A) > #define AARCH64_ISA_CRC (aarch64_isa_flags & AARCH64_FL_CRC) > #define AARCH64_ISA_CRYPTO (aarch64_isa_flags & AARCH64_FL_CRYPTO) > #define AARCH64_ISA_FP (aarch64_isa_flags & AARCH64_FL_FP) > @@ -215,6 +217,8 @@ enum class aarch64_feature : unsigned char { > #define AARCH64_ISA_SB (aarch64_isa_flags & AARCH64_FL_SB) > #define AARCH64_ISA_V8R (aarch64_isa_flags & AARCH64_FL_V8R) > #define AARCH64_ISA_PAUTH (aarch64_isa_flags & AARCH64_FL_PAUTH) > +#define AARCH64_ISA_V8_7A (aarch64_isa_flags & AARCH64_FL_V8_7A) > +#define AARCH64_ISA_V8_8A (aarch64_isa_flags & AARCH64_FL_V8_8A) > #define AARCH64_ISA_V9A (aarch64_isa_flags & AARCH64_FL_V9A) > #define AARCH64_ISA_V9_1A (aarch64_isa_flags & AARCH64_FL_V9_1A) > #define AARCH64_ISA_V9_2A (aarch64_isa_flags & AARCH64_FL_V9_2A) > @@ -223,6 +227,38 @@ enum class aarch64_feature : unsigned char { > #define AARCH64_ISA_LS64 (aarch64_isa_flags & AARCH64_FL_LS64) > #define AARCH64_ISA_CSSC (aarch64_isa_flags & AARCH64_FL_CSSC) > > +/* AARCH64_FL options necessary for system register implementation. */ > + > +/* Mask for core system registers. System registers requiring no architectural > + extensions set up a feature-checking mask which returns any passed flags > + unchanged when ANDd with. */ > +#define AARCH64_NO_FEATURES (uint64_t)-1 > + > +/* Define AARCH64_FL aliases for architectural features which are protected > + by -march flags in binutils but which receive no special treatment by GCC. > + > + Such flags are inherited from the Binutils definition of system registers > + and are mapped to the architecture in which the feature is implemented. */ > +#define AARCH64_FL_RAS AARCH64_FL_V8A > +#define AARCH64_FL_LOR AARCH64_FL_V8_1A > +#define AARCH64_FL_PAN AARCH64_FL_V8_1A > +#define AARCH64_FL_AMU AARCH64_FL_V8_4A > +#define AARCH64_FL_SCXTNUM AARCH64_FL_V8_5A > +#define AARCH64_FL_ID_PFR2 AARCH64_FL_V8_5A > + > +/* Define AARCH64_FL aliases for features note yet implemented in GCC. > + Accept them unconditionally. */ > +#define AARCH64_FL_SME -1 > + > +/* Flags associated with the properties of system registers. It mainly serves > + to mark particular registers as read or write only. */ > +#define F_DEPRECATED (1 << 1) > +#define F_REG_READ (1 << 2) > +#define F_REG_WRITE (1 << 3) > +#define F_ARCHEXT (1 << 4) > +/* Flag indicating register name is alias for another system register. */ > +#define F_REG_ALIAS (1 << 5) > + > /* Crypto is an optional extension to AdvSIMD. */ > #define TARGET_CRYPTO (AARCH64_ISA_CRYPTO) >