From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 70949 invoked by alias); 6 Dec 2018 18:44:17 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 70931 invoked by uid 89); 6 Dec 2018 18:44:16 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-8.2 required=5.0 tests=BAYES_05,GIT_PATCH_2,GIT_PATCH_3,KAM_ASCII_DIVIDERS,KAM_LAZY_DOMAIN_SECURITY,KAM_NUMSUBJECT,KAM_SHORT,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy=Assembly, regs, NO_REGS, DImode X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 06 Dec 2018 18:44:14 +0000 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0F3BF3078AB2 for ; Thu, 6 Dec 2018 18:44:13 +0000 (UTC) Received: from [10.10.120.241] (ovpn-120-241.rdu2.redhat.com [10.10.120.241]) by smtp.corp.redhat.com (Postfix) with ESMTP id 57A6D60E3F for ; Thu, 6 Dec 2018 18:44:12 +0000 (UTC) To: "gcc-patches@gcc.gnu.org" From: Vladimir Makarov Subject: Another patch for PR88282 Message-ID: Date: Thu, 06 Dec 2018 18:44:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------046F0298358D794EC397DA9A" X-IsSubscribed: yes X-SW-Source: 2018-12/txt/msg00389.txt.bz2 This is a multi-part message in MIME format. --------------046F0298358D794EC397DA9A Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-length: 227   Here is another solution for https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88282   less hackish than original one.   The patch was bootstrapped and tested on x86/x86-64/ppc64/aarch64.   Committed as rev. 266862. --------------046F0298358D794EC397DA9A Content-Type: text/x-patch; name="pr88282-2.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="pr88282-2.patch" Content-length: 3529 Index: ChangeLog =================================================================== --- ChangeLog (revision 266861) +++ ChangeLog (working copy) @@ -1,3 +1,11 @@ +2018-12-06 Vladimir Makarov + + PR target/88282 + * ira.c (ira_init_register_move_cost): Use info from + hard_regno_mode_ok instead of contains_reg_of_mode. + * ira-costs.c (contains_reg_of_mode): Don't use cost from bigger + hard register class for some fixed hard registers. + 2018-12-06 Segher Boessenkool * doc/extend.texi (Using Assembly Language with C): Document asm inline. Index: ira.c =================================================================== --- ira.c (revision 266861) +++ ira.c (working copy) @@ -1573,11 +1573,17 @@ ira_init_register_move_cost (machine_mod { static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES]; bool all_match = true; - unsigned int cl1, cl2; + unsigned int i, cl1, cl2; + HARD_REG_SET ok_regs; ira_assert (ira_register_move_cost[mode] == NULL && ira_may_move_in_cost[mode] == NULL && ira_may_move_out_cost[mode] == NULL); + CLEAR_HARD_REG_SET (ok_regs); + for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) + if (targetm.hard_regno_mode_ok (i, mode)) + SET_HARD_REG_BIT (ok_regs, i); + /* Note that we might be asked about the move costs of modes that cannot be stored in any hard register, for example if an inline asm tries to create a register operand with an impossible mode. @@ -1586,8 +1592,8 @@ ira_init_register_move_cost (machine_mod for (cl2 = 0; cl2 < N_REG_CLASSES; cl2++) { int cost; - if (!contains_reg_of_mode[cl1][mode] - || !contains_reg_of_mode[cl2][mode]) + if (!hard_reg_set_intersect_p (ok_regs, reg_class_contents[cl1]) + || !hard_reg_set_intersect_p (ok_regs, reg_class_contents[cl2])) { if ((ira_reg_class_max_nregs[cl1][mode] > ira_class_hard_regs_num[cl1]) Index: ira-costs.c =================================================================== --- ira-costs.c (revision 266784) +++ ira-costs.c (working copy) @@ -1323,14 +1323,6 @@ record_operand_costs (rtx_insn *insn, en move_costs = ira_register_move_cost[mode]; hard_reg_class = REGNO_REG_CLASS (other_regno); bigger_hard_reg_class = ira_pressure_class_translate[hard_reg_class]; - if (bigger_hard_reg_class == NO_REGS - && (other_regno == STACK_POINTER_REGNUM -#ifdef STATIC_CHAIN_REGNUM - || other_regno == STATIC_CHAIN_REGNUM -#endif - || other_regno == FRAME_POINTER_REGNUM - || other_regno == HARD_FRAME_POINTER_REGNUM)) - bigger_hard_reg_class = GENERAL_REGS; /* Target code may return any cost for mode which does not fit the the hard reg class (e.g. DImode for AREG on i386). Check this and use a bigger class to get the @@ -1345,17 +1337,6 @@ record_operand_costs (rtx_insn *insn, en cost = (i == 0 ? move_costs[hard_reg_class][rclass] : move_costs[rclass][hard_reg_class]); - /* Target code might define wrong big costs for smaller - reg classes or reg classes containing only fixed hard - regs. Try a bigger class. */ - if (bigger_hard_reg_class != hard_reg_class) - { - int cost2 = (i == 0 - ? move_costs[bigger_hard_reg_class][rclass] - : move_costs[rclass][bigger_hard_reg_class]); - if (cost2 < cost) - cost = cost2; - } op_costs[i]->cost[k] = cost * frequency; /* If we have assigned a class to this allocno in our --------------046F0298358D794EC397DA9A--