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* [RFC] postreload cse'ing vector constants
@ 2022-09-07 14:40 Robin Dapp
  2022-09-07 15:06 ` Jeff Law
  0 siblings, 1 reply; 10+ messages in thread
From: Robin Dapp @ 2022-09-07 14:40 UTC (permalink / raw)
  To: GCC Patches


I recently looked into a sequence like

 vzero %v0
 vlr   %v2, %v0
 vlr   %v3, %v0.

Ideally we would like to use vzero for all of these sets in order to not
create dependencies.

For some instances of this problem I found the offending snippet to be
the postreload cse pass. If there is a non hard reg whose value is
equivalent to an existing hard reg, it will replace the non hard reg.
The costs are only compared if the respective operand is a CONST_INT_P,
otherwise we always replace.

The comment before says:
   /* See if REGNO fits this alternative, and set it up as the

      replacement register if we don't have one for this

      alternative yet and the operand being replaced is not

      a cheap CONST_INT.  */

Now, in my case we have a CONST_VECTOR consisting of CONST_INTS (zeros).
 This is obviously no CONST_INT therefore the substitution takes place
resulting in a "vlr" instead of a "vzero".
Would it not make sense to always compare costs here? Some backends have
instructions for loading vector constants and there could also be
backends able to load floating point constants directly.

For my snippet getting rid of the CONST_INT check suffices because the
costs are similar and no replacement happens.  Was this originally a
shortcut for performance reasons?  I thought we were not checking that
many alternatives and only locally at this point anymore.

Any comments or ideas?



diff --git a/gcc/ b/gcc/
index 41f61d326482..934439733d52 100644
--- a/gcc/
+++ b/gcc/
@@ -558,13 +558,12 @@ reload_cse_simplify_operands (rtx_insn *insn, rtx
                  if (op_alt_regno[i][j] == -1
                      && TEST_BIT (preferred, j)
                      && reg_fits_class_p (testreg, rclass, 0, mode)
-                     && (!CONST_INT_P (recog_data.operand[i])
-                         || (set_src_cost (recog_data.operand[i], mode,
-                                           optimize_bb_for_speed_p
-                                            (BLOCK_FOR_INSN (insn)))
-                             > set_src_cost (testreg, mode,
-                                             optimize_bb_for_speed_p
-                                              (BLOCK_FOR_INSN (insn))))))
+                     && (set_src_cost (recog_data.operand[i], mode,
+                                       optimize_bb_for_speed_p
+                                        (BLOCK_FOR_INSN (insn)))
+                         > set_src_cost (testreg, mode,
+                                         optimize_bb_for_speed_p
+                                          (BLOCK_FOR_INSN (insn)))))
                      op_alt_regno[i][j] = regno;

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2022-11-20 16:40 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-07 14:40 [RFC] postreload cse'ing vector constants Robin Dapp
2022-09-07 15:06 ` Jeff Law
2022-09-07 15:33   ` Robin Dapp
2022-09-07 15:49     ` Jeff Law
2022-09-08 13:04       ` Robin Dapp
2022-09-27 17:40         ` Robin Dapp
2022-09-27 19:39           ` H.J. Lu
2022-09-28 16:48             ` Robin Dapp
2022-11-03 12:38               ` Robin Dapp
2022-11-20 16:40                 ` Jeff Law

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