From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ot1-x32a.google.com (mail-ot1-x32a.google.com [IPv6:2607:f8b0:4864:20::32a]) by sourceware.org (Postfix) with ESMTPS id C58B738A8149 for ; Tue, 15 Nov 2022 17:36:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C58B738A8149 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ot1-x32a.google.com with SMTP id cn2-20020a056830658200b0066c74617e3dso8926890otb.2 for ; Tue, 15 Nov 2022 09:36:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=AtXn9nED06AupwSGBxrJ3N0EuZzuxw3al5h69Ngb9/Q=; b=MqDwLIoDHPTlABxF2iLF1f8mJ++MNM1tcJboYCR0umfmCr5ae6q1yd0ENE4hyQsoGL V7N3gFSOOujpinAUagBgBxu47vhZ1b6Wd24ixXUvpqhL4VSixJWfOGvQhwJMQBjM3h/j /QwfCSqKsv59y7A3SVshZbxp0BFB6P6rueUX1NeIgc9lYJP3vFVwQrUzyToxwOQMS4KQ klPm/kAPR86QM2kOiZ70mU9RpgWKZ60EixsCQ8PQrAcomlThbCB1EfF8Q4cATHdFzv9r OnTd3i23xdUMnIinWFFuC1m1oVxzMvna2vFUE2Lv9r7GkfmgHmRQL4mwNsK2bHuZY6Pz o0/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=AtXn9nED06AupwSGBxrJ3N0EuZzuxw3al5h69Ngb9/Q=; b=RvClt/R/YPOTDbLpc2jtyF6nfnmxRZZTQPEvSqzy1oFv+vyCvnpJFpQFRQ1B7HitWN IlerFG3F2q7axVnV4QIchVMa9iOqn+hKqVIhnM+CV9Y+lwj69sUNuJCwIGPB/Vyn0ojZ 7kXXOu5W55iaBffY6K2/+9Ux4t0pC9up7FKTNwk+Li87vm5qjAprrI3hC3nFM4on3yxx iiqyIr2NDMWN4HW1NhDocdtQLZgh/Jp51K+T9J72WX1YsKyDkTpwaoMBn+bwS4A9IInf IdAjyDYYD2GStwAJAZ3iECNF5e+GFK1Svun5Zu2tLYfl79Qy8Gt473xG0kNXhqVt0ina GOaQ== X-Gm-Message-State: ANoB5pn7sunlgla+ses4zBeaFh9FvIrZzK6RyUDpsamZ3JvyoIgv3tnR IH2F0yyzEyXzH5/QcVL9qN0= X-Google-Smtp-Source: AA0mqf5MiNtaDvwWr2ZPj9/Esj7SuUOnE30EgLf6zPz1k8I2Ze2LukQRsO1ZpZuIfjffq2wR1/OwQw== X-Received: by 2002:a9d:12a:0:b0:66c:3403:9dca with SMTP id 39-20020a9d012a000000b0066c34039dcamr9232282otu.372.1668533799944; Tue, 15 Nov 2022 09:36:39 -0800 (PST) Received: from ?IPV6:2601:681:8600:13d0::f0a? ([2601:681:8600:13d0::f0a]) by smtp.gmail.com with ESMTPSA id h24-20020a9d6f98000000b00661b46cc26bsm5541598otq.9.2022.11.15.09.36.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 15 Nov 2022 09:36:39 -0800 (PST) Message-ID: Date: Tue, 15 Nov 2022 10:36:37 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.1 Subject: Re: [PATCH] RISC-V: Split "(a & (1UL << bitno)) ? 0 : 1" to bext + xori Content-Language: en-US To: Philipp Tomsich , gcc-patches@gcc.gnu.org Cc: Jeff Law , Palmer Dabbelt , Christoph Muellner , Kito Cheng , Vineet Gupta References: <20221113204849.4062129-1-philipp.tomsich@vrull.eu> From: Jeff Law In-Reply-To: <20221113204849.4062129-1-philipp.tomsich@vrull.eu> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,KAM_SHORT,NICE_REPLY_A,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 11/13/22 13:48, Philipp Tomsich wrote: > We avoid reassociating "(~(a >> BIT_NO)) & 1" into "((~a) >> BIT_NO) & 1" > by splitting it into a zero-extraction (bext) and an xori. This both > avoids burning a register on a temporary and generates a sequence that > clearly captures 'extract bit, then invert bit'. > > This change improves the previously generated > srl a0,a0,a1 > not a0,a0 > andi a0,a0,1 > into > bext a0,a0,a1 > xori a0,a0,1 > > Signed-off-by: Philipp Tomsich > > gcc/ChangeLog: > > * config/riscv/bitmanip.md: Add split covering > "(a & (1 << BIT_NO)) ? 0 : 1". > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/zbs-bext.c: Add testcases. > * gcc.target/riscv/zbs-bexti.c: Add testcases. OK.   Not terribly happy with the SUBREG, but I can guess that's an artifact of other patterns which require that operand to be QImode. Jeff