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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 11 Oct 2018 15:05:04 -0600 Received: from b03ledav004.gho.boulder.ibm.com (b03ledav004.gho.boulder.ibm.com [9.17.130.235]) by b03cxnp07028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w9BL53fb52887798 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 11 Oct 2018 14:05:03 -0700 Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 334DD78064; Thu, 11 Oct 2018 15:05:03 -0600 (MDT) Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 527E178067; Thu, 11 Oct 2018 15:05:02 -0600 (MDT) Received: from otta.local (unknown [9.80.238.11]) by b03ledav004.gho.boulder.ibm.com (Postfix) with ESMTP; Thu, 11 Oct 2018 15:05:02 -0600 (MDT) Subject: Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register To: Jeff Law Cc: Vladimir Makarov , Christophe Lyon , gcc Patches References: <14bf79ef-9db2-e76b-df10-fcb2574d5ccb@linux.ibm.com> <121ca751-fb38-d7e1-bffd-89df22a2fdd7@redhat.com> <05a29347-7a39-a1e6-42b8-16c779b97eb5@redhat.com> <703aaa46-eac5-63d1-22dc-0cd31a0e840f@redhat.com> <276824e1-6306-1ac6-b6ba-6b11eac615e7@linux.ibm.com> <191bf9ee-98c4-b87e-cc65-40e1fb5de0ea@linux.ibm.com> <478a817c-719b-9c3c-5b38-de7b277d9f93@linux.ibm.com> <13a249ee-160b-2b28-151c-bed3faacbfc1@linux.ibm.com> <641b86b8-0302-2a4f-482c-ac6377a69600@redhat.com> From: Peter Bergner Date: Thu, 11 Oct 2018 21:09:00 -0000 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.13; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <641b86b8-0302-2a4f-482c-ac6377a69600@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit x-cbid: 18101121-0020-0000-0000-00000E7729F0 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00009862; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000268; SDB=6.01101263; UDB=6.00569848; IPR=6.00881308; MB=3.00023718; MTD=3.00000008; XFM=3.00000015; UTC=2018-10-11 21:05:05 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18101121-0021-0000-0000-000063573015 Message-Id: X-IsSubscribed: yes X-SW-Source: 2018-10/txt/msg00699.txt.bz2 On 10/11/18 2:40 PM, Jeff Law wrote: > On 10/11/18 1:23 PM, Peter Bergner wrote: >> On 10/11/18 1:18 PM, Peter Bergner wrote: >>> Ok, after working in gdb, I see that the PA-RISC port still uses reload >>> and not LRA, but it too seems to have the same issue of reusing input >>> regs that have REG_DEAD notes, so the question still stands. It's just >>> that whatever fix we come up with will have to be to both LRA and reload. >> >> On second thought, I'm thinking we should just leave reload alone and >> only fix this in LRA. That means we'd have to disable the reg copy >> handling when not using LRA though, which might be another reason to >> get targets to move to LRA? I've verified the following patch gets >> the PA-RISC test case to pass again. Thoughts? >> >> If ok, I still have to dig into the fails we're seeing on LRA targets. > Hmmm. Interesting. I wonder if all the failing targets were reload > targets..... If so, this may be the way forward -- I certainly don't > want to spend much, if any, time fixing reload. > > I'm in the middle of something, but will try to look at each of the > failing targets and confirm they use reload by default. These are the easy ones (they default to reload): bergner@pike:~/gcc/gcc-fsf-mainline/gcc/config$ grep -r TARGET_LRA_P | grep false | sort alpha/alpha.c:#define TARGET_LRA_P hook_bool_void_false avr/avr.c:#define TARGET_LRA_P hook_bool_void_false bfin/bfin.c:#define TARGET_LRA_P hook_bool_void_false c6x/c6x.c:#define TARGET_LRA_P hook_bool_void_false cr16/cr16.c:#define TARGET_LRA_P hook_bool_void_false cris/cris.c:#define TARGET_LRA_P hook_bool_void_false epiphany/epiphany.c:#define TARGET_LRA_P hook_bool_void_false fr30/fr30.c:#define TARGET_LRA_P hook_bool_void_false frv/frv.c:#define TARGET_LRA_P hook_bool_void_false h8300/h8300.c:#define TARGET_LRA_P hook_bool_void_false ia64/ia64.c:#define TARGET_LRA_P hook_bool_void_false iq2000/iq2000.c:#define TARGET_LRA_P hook_bool_void_false lm32/lm32.c:#define TARGET_LRA_P hook_bool_void_false m32c/m32c.c:#define TARGET_LRA_P hook_bool_void_false m32r/m32r.c:#define TARGET_LRA_P hook_bool_void_false m68k/m68k.c:#define TARGET_LRA_P hook_bool_void_false mcore/mcore.c:#define TARGET_LRA_P hook_bool_void_false microblaze/microblaze.c:#define TARGET_LRA_P hook_bool_void_false mmix/mmix.c:#define TARGET_LRA_P hook_bool_void_false mn10300/mn10300.c:#define TARGET_LRA_P hook_bool_void_false moxie/moxie.c:#define TARGET_LRA_P hook_bool_void_false msp430/msp430.c:#define TARGET_LRA_P hook_bool_void_false nvptx/nvptx.c:#define TARGET_LRA_P hook_bool_void_false pa/pa.c:#define TARGET_LRA_P hook_bool_void_false rl78/rl78.c:#define TARGET_LRA_P hook_bool_void_false spu/spu.c:#define TARGET_LRA_P hook_bool_void_false stormy16/stormy16.c:#define TARGET_LRA_P hook_bool_void_false tilegx/tilegx.c:#define TARGET_LRA_P hook_bool_void_false tilepro/tilepro.c:#define TARGET_LRA_P hook_bool_void_false vax/vax.c:#define TARGET_LRA_P hook_bool_void_false visium/visium.c:#define TARGET_LRA_P hook_bool_void_false xtensa/xtensa.c:#define TARGET_LRA_P hook_bool_void_false These are harder since they support -mlra: arc/arc.c:#define TARGET_LRA_P arc_lra_p ft32/ft32.c:#define TARGET_LRA_P ft32_lra_p mips/mips.c:#define TARGET_LRA_P mips_lra_p pdp11/pdp11.c:#define TARGET_LRA_P pdp11_lra_p powerpcspe/powerpcspe.c:#define TARGET_LRA_P rs6000_lra_p rx/rx.c:#define TARGET_LRA_P rx_enable_lra s390/s390.c:#define TARGET_LRA_P s390_lra_p sh/sh.c:#define TARGET_LRA_P sh_lra_p sparc/sparc.c:#define TARGET_LRA_P sparc_lra_p Quickly looking into their *.opt files, the follwoing default to LRA: mips, s390 while these default to reload: ft32, sh4 and these I'm not sure of without looking deeper: arc, pdp11, powerpcspe, rx, sparc ...if that helps. Peter